Also fixes a bug where ERC testing for text variables in sheet pins
would start with the wrong sheet.
Also fixes a bug where ERC testing of similar labels would use the
wrong sheet.
Also fixes a bug where ERC testing of bus-to-net conflicts would use
the wrong sheet.
Also fixes a bug where ERC didn't process variable references when
checking hierarchical labels against sheet pins.
Also fixes a bug where ERC multiple-drivers and netclass-conflicts
tests didn't set a sheetpath.
Rather than generating expensive classes to store in a set to check for
duplicate checks, we avoid double-checking elements in the vector. For
large schematics this results in a substantial speed increase
(cherry picked from commit 1a5c515e45)
A sheetpath is required to correctly resolve text variables.
Depending on currentSheet is rife with bugs.
There are many places where we do *not* want to be prepending
field names to the field values, such as netlisting,
building PDF hypertext menus, etc.
Also, Find/Replace needs to work on unresolved text, as
that's what we're going to display (and if replace nuked
your variable references you wouldn't be happy).
- Consistent calculation of IsStacked() for pins across ERC checks
- Correct placement of ERC marker for unresolved field variables
- Add sheet-specific paths to two ERC check results
Fixes#10926
Contains the following changes:
- Adds a new ERC_SCH_PIN_CONTEXT class which is used to provide deterministic
comparison between items causing ERC violations (e.g. pins) when associated
with a SCH_SHEET_PATH context.
- Adds association of SCH_SHEET_PATHs for ERC_ITEMs and the sub-schematic items
which caused an ERC violation. This allows correct display of markers on the
sheets of interest only, and allows correct naming resolution and cross-probing
from the ERC dialog.
- Adds a new ERC_TREE_MODEL class, derived from RC_TREE_MODEL, which correctly
resolves component references across heirarchical sheets using the associated
SCH_SHEET_PATHs. This allows sheet-specific component references to be displayed
correctly in the ERC results tree.
- Updates SCH_MARKER to only draw sheet-specific markers on the sheet causing
an ERC violation.
- Increments the schematic file version.
- When loading a schematic with legacy ERC exclusions, discards those of type
ERCE_PIN_TO_PIN_WARNING, ERCE_PIN_TO_PIN_ERROR, ERCE_HIERACHICAL_LABEL, and
ERCE_DIFFERENT_UNIT_NET as there is no safe way to automatically infer the
information which is now stored with these exclusions (sheet paths for error
location and related items). Requiring users to (once) re-add exclusions is
preferable to silently incorrectly matching new ERC issues to legacy exclusions.
We only need to parse the libraries for the Sim Model Editor dialog
(so that we can determine the models to put in the popup). Doing it
for netlisting just opens us up to incorrectly parsing the SPICE, and
returns no value.
This also means that a SIM_LIB_MGR manages a single library, and
never multiple libraries.
This also allows the tidying-up of some error reporting structures to
better inform the user what went wrong.
Fixes https://gitlab.com/kicad/code/kicad/issues/13431
This moves some stuff to REPORTER APIs. Moving more stuff would be good,
but it probably too high-risk at present. We'll wait for 8.0 for that....
Fixes https://gitlab.com/kicad/code/kicad/issues/13359
Reports a warning (by default) for missing units
Reports an error for missing units with power input pins
Reports a warning for missing units with input pins
Reports a warning for missing units with bidi pins
Fixes https://gitlab.com/kicad/code/kicad/issues/1922
This is mostly to output the aliases sorted (for ease of VCS integration),
but also because a btree will be faster than hashing on a small dataset.
Fixes https://gitlab.com/kicad/code/kicad/issues/11890
The hash table for integer hashes is extremely limited and places most
elements in the same buckets. This leads to a linear search time for
structures built on this.
This blocks hashes, directing the coder to utilize std::set or std::map
structures instead of hash tables for implementing integer-based
lookups.
1) Move a bunch of std::map's to std::unordered_map to get constant-time
look-ups
2) Lengthen progress-reporting intervals to spend more time doing work
and less time talking about it
3) Reverse order of SHAPE_LINE_CHAINs in thermal intersection checks to
make (much) better use of bbox caches
4) Don't re-generate bboxes we already have
5) Fix some autos that weren't by reference (and were therefore copying
large datasets)
6) Rename delta progressDelta so it's easier to search for in future
7) Get rid of a few more autos (because I don't like them)
8) Pass large items to lambdas by reference
Fixes https://gitlab.com/kicad/code/kicad/issues/12130
Removes the need for the "KiCad" workaround where stacked pins need
to be "Passive" type. Pins that have the same parent symbol, name,
position and type are considered to be the same output and do not
trigger ERC errors
Fixes https://gitlab.com/kicad/code/kicad/issues/5367
Better to have both the single-pin error message and the non-driven
error message when an input pin is not connected than miss error
messages when the pin is connected to a blank net
Fixes https://gitlab.com/kicad/code/kicad/issues/10430
(cherry picked from commit e740db61f5)
Before they were 1/2 treated as flags and 1/2 treated as a mode enum.
The ERC flag relaxes constraints on data that is settable in the
schematic editor.
Fixes https://gitlab.com/kicad/code/kicad/issues/11018
Wayne Stambaugh
Jeff Young
Seth Hillbrand
Marek Roszko
Mike Williams
jean-pierre charras
James J
Mikolaj Wielgus