2eb71447e4
DRC RTree fixes.
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1) Don't collide against hidden text
2) Don't collide in both directions (a:b & b:a)
2020-11-14 16:59:34 +00:00
bdbb68f813
MODULE -> FOOTPRINT.
2020-11-13 16:04:03 +00:00
3451ac3088
PCB_MODULE_T -> PCB_FOOTPRINT_T
2020-11-13 15:16:24 +00:00
63a54d003e
More module -> footprint.
2020-11-13 15:16:24 +00:00
9106cc19bf
Yet another tranche of module -> footprint.
2020-11-13 15:16:24 +00:00
52a46341db
More module -> footprint.
2020-11-13 15:16:24 +00:00
f5443de7f9
D_PAD -> PAD.
2020-11-13 15:16:24 +00:00
84dd5108ba
Remove some "class_" prefixes from files.
2020-11-13 15:16:23 +00:00
f7333ad64a
Update some classnames including archaic zone names.
2020-11-12 10:31:25 +00:00
d88eaaf477
Fix various compiler and Coverity warnings
2020-11-11 00:41:02 +00:00
81ea71fb80
More safety when fetching via sizes.
2020-11-07 18:50:30 +00:00
ae9afdd169
SNR. (Mostly for progammers, but a little for user messages.)
2020-11-02 16:20:00 +00:00
c351b3c31f
Naming conventions.
2020-11-01 14:12:35 +00:00
f600450ee6
DRC_TEST_PROVIDER_COPPER_CLEARANCES is for copper only.
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Fixes https://gitlab.com/kicad/code/kicad/issues/6248
2020-11-01 14:12:35 +00:00
d2befca5af
Clear subshapes before using again on a different layer.
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Fixes https://gitlab.com/kicad/code/kicad/issues/6248
2020-11-01 14:12:35 +00:00
7676ba6f5d
Coverity warning.
2020-11-01 14:12:35 +00:00
a9bf4bc6a6
Fix freed-memory crasher.
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While the DRC_ENGINE is not long-lived, it's test providers are,
and must be cleared for each use.
2020-10-31 15:45:41 +00:00
115fd1d7f3
Move track-to-zone testing to RTrees.
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Also implemente pad-to-zone testing and removes the control in the
GUI (now that it's fast).
2020-10-31 15:45:41 +00:00
1a1aef756e
Reporting "actual" incompatible with exiting after first hit.
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But we're currently using this only as a rough collision check
anyway as it doesn't know the specific item-to-item clearance.
2020-10-31 15:45:41 +00:00
788a1e3bce
Handle footprint zones in zone collision checks.
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Also fixes issue with progress reporter.
2020-10-31 15:45:41 +00:00
cd93dbd324
Naming cleanup.
2020-10-31 15:45:41 +00:00
8d4c9aeaac
Fix Mac-style include.
2020-10-31 15:45:41 +00:00
d5addb692c
Move a bunch of DRC tests to RTrees.
2020-10-31 15:45:41 +00:00
776ea35040
Fix copy/paste error and some formatting issues.
2020-10-27 22:46:19 +00:00
a7d5d1f091
Add more consts all over the place
2020-10-27 11:03:35 +00:00
2e94be0855
Move geometric parts of Cleanup Tracks and Vias to RTree.
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Removes two separate O(n^2) traverses over the tracks.
Fixes https://gitlab.com/kicad/code/kicad/issues/6077
2020-10-26 18:37:59 +00:00
c092e3f8b7
Fix a few minor Coverity warnings
2020-10-26 10:46:08 +01:00
1984581c46
Remove common.h from more headers
2020-10-25 22:29:53 -04:00
45113f983b
Fix test case.
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Silk tests were processing MODULE_Ts when they shouldn't have been.
2020-10-25 23:19:39 +00:00
2ee61f52ca
Implement correct layer handling for keepout constraints.
2020-10-25 22:47:47 +00:00
8c93fc76ae
Don't require keepout zones to be named.
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insideArea() now takes A, B, a UUID or a zone name. (Only the UUID
is new.)
2020-10-25 21:08:09 +00:00
5b1e1075a9
Allow an easy way for DRC tests to specify compound objects or not.
2020-10-25 20:24:47 +00:00
386cefbe84
Do footprint keepouts by courtyard.
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Fixes https://gitlab.com/kicad/code/kicad/issues/6162
2020-10-25 18:17:58 +00:00
d6f91c810f
Fix a few compil and Coverity warnings.
2020-10-25 10:02:07 +01:00
e928b2d8fd
Split EDA_UNITS out from common.
2020-10-25 00:02:52 -04:00
7674d2ba91
Free allocated DRC structures when re-initializing.
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Fixes https://gitlab.com/kicad/code/kicad/issues/6147
2020-10-24 22:39:53 +01:00
66bcfb3ffc
drc_engine: Fix via type names
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There was a mismatch between the via type names used in the DRC engine
and the via type names defined in the class_track.cpp ENUM_MAP for
VIATYPE.
This fixes the discrepancy; which was breaking microvias altogether as
the route tool also uses the DRC code to determine the correct
diameter/drill (without this patch it was incorrectly using regular
dimensions for microvias.)
2020-10-24 15:46:47 +00:00
59f3fefd17
When polygonizing arcs don't use synthesized center and angle.
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Start, mid and end are the "real" properties and come with less
error.
Also collapses two arc polygonization routines into one.
Also fixes DRC checks to be cognizant of arc approximation error.
Fixes https://gitlab.com/kicad/code/kicad/issues/6039
2020-10-23 23:55:45 +01:00
19bf594aa0
Remove unused point in polygon test
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There can be only one.
2020-10-23 12:13:09 -07:00
01ce881340
Honour NOT_IN_SCHEMATIC setting.
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Fixes https://gitlab.com/kicad/code/kicad/issues/6137
2020-10-23 17:27:18 +01:00
cce557b9ad
Redo the board-edge-building logic to return better error reports.
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Fixes https://gitlab.com/kicad/code/kicad/issues/6119
2020-10-22 21:29:04 +01:00
41fd8293e8
Don't apply clearance to keepout zones.
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Also improves the clearance and keepout reporting.
Fixes https://gitlab.com/kicad/code/kicad/issues/6118
2020-10-22 21:29:04 +01:00
9ff49277e1
Add implicit rule generation for keepout areas.
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Also implements collision detection for SHAPE_POLY_SET.
Fixes https://gitlab.com/kicad/code/kicad/issues/6105
2020-10-22 10:41:21 +01:00
4085757aeb
Remove beginning/ending spaces in translations
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Adding space padding makes translations more difficult by increasing
string counts
2020-10-20 12:08:04 -07:00
18f9f3cf0b
Add curved track support to track-to-zone DRC.
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Fixes https://gitlab.com/kicad/code/kicad/issues/6039
2020-10-20 13:38:09 +01:00
8ff51d8899
Eeschema: add schematic sheet page number.
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The groundwork has now been laid for per sheet instance data. Initially
this only supports sheet page numbers but could be expanded to include
other per sheet instance information.
ADDED: Support for user defined schematic page numbers.
2020-10-19 14:05:45 -04:00
c5d45f8a78
Move DRC dialog to same DRC rule reporting mechanism as inspectors.
2020-10-17 20:40:05 +01:00
6e54856e67
Don't halt other tests when one test's max is reached.
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Fixes https://gitlab.com/kicad/code/kicad/issues/6035
2020-10-17 12:13:04 +01:00
1b2168af1e
Don't throw implicit rules out after failing to compile user rules.
2020-10-16 12:44:20 +01:00
eea7957e16
Inform user of bad DRC rules when filling zones.
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ADDED: facility for hypertext links in infobar.
Also made use of this for via constraint errors when routing.
Fixes https://gitlab.com/kicad/code/kicad/issues/5800
2020-10-16 12:44:20 +01:00
6b7749658e
Report all implicit rules for resolution reports.
2020-10-15 20:53:27 +01:00
ebd5dc81cc
Fix some more cases of malformed syntax crashing the compiler.
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Fixes https://gitlab.com/kicad/code/kicad/issues/6016
2020-10-15 18:32:52 +01:00
5ac17288a9
Work around missing copy constructor for PCB_SHAPE.
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Also introduces performance enhancements so that single closed shapes
for board edges don't eliminate the effectiveness of the RTree.
Fixes https://gitlab.com/kicad/code/kicad/issues/5990
2020-10-15 11:38:18 +01:00
1d93effa14
Don't build RTrees if test results will be ignored.
2020-10-14 15:56:32 +01:00
f220e83de6
Board edges have no width.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5990
2020-10-14 15:56:32 +01:00
2c86363aa0
Relocate the page_layout includes to a page_layout folder
2020-10-13 20:33:33 -04:00
cb1d416e5a
Use settings keys, not error codes, for ERC/DRC reports
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Error codes can shift around if the enum ordering is
not maintained, which is more fragile than the settings
key which should never be changed after a new code is
created.
Fixes https://gitlab.com/kicad/code/kicad/-/issues/6001
2020-10-13 18:03:07 -04:00
3fc1a0c314
Fix faulty copper-checking logic.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5978
2020-10-13 16:32:54 +01:00
2e6968e7eb
Board edges tester also needs to check silk text for visibility.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5989
2020-10-13 00:58:38 +01:00
83d231cd49
Fix test under msvc
2020-10-12 19:47:36 -04:00
8c4197db2a
Netclass track widths and via sizes are opts, not mins.
2020-10-13 00:34:10 +01:00
cd1a5ed6fb
Implement progress reporting for DRC RTree.
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Also fixes a bug in silk-to-mask checking which wasn't checking
zones on the mask layer.
Also a perfomance fix for the DRC RTree to use a hash table (std::map)
instead of a std::set for keeping track of known collisions.
Fixes https://gitlab.com/kicad/code/kicad/issues/5851
2020-10-13 00:03:58 +01:00
5afae757ff
Remove silk_clearance == 0 hack now that we have implied rules.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5977
2020-10-12 21:13:26 +01:00
af90642440
Hook board edge clearance constraints up to zone filling.
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Also hooks them up to the clearance resolution reporter, and makes
some general improvements to reporting.
Fixes https://gitlab.com/kicad/code/kicad/issues/5947
2020-10-12 18:31:00 +01:00
32dffd27ab
Add silk clearance to board setup constraints.
2020-10-12 18:31:00 +01:00
1bcefe420a
Move compound graphics tests back out to the shared path.
2020-10-12 11:46:08 +01:00
72f6127e53
Clean up terminology so it matches the user message better.
2020-10-12 00:14:32 +01:00
8e70381be3
Don't try and infer optimum widths for board minimums.
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It doesn't work well with sorting the implicit rules by clearance.
Fixes https://gitlab.com/kicad/code/kicad/issues/5951
2020-10-11 17:17:21 +01:00
af28ef9d56
Add silk clearance checking to Resolve Clearances...
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Also fixes a bug in order of RTrees in silk collision checker.
2020-10-11 14:18:11 +01:00
42eecdfd3a
Collapse silk constraints down to one.
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Also updates the rule syntax help and code-completion with a bunch
of diff-pair and other stuff that hadn't been updated yet.
2020-10-11 13:19:23 +01:00
bcebb19665
Add implied diffpair netclass rules.
2020-10-11 13:19:23 +01:00
22cde88ba9
Allow chamfering/filleting of zone/board edge intersections.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5947
2020-10-10 23:09:43 +01:00
04c4012ee6
Make track/via sizes UI more predictable and compatible with DRC.
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Two main changes: netclass values need to go through the DRC engine
so they can interact with other rules. They're also now dependent
on the layer being routed as well as the start object.
Also make the controls adjust to each other better. For instance,
copy-track-width needs to turn off when you select a particular
track width, and a particular track width needs to zero out when
you choose copy-track-width.
Fixes https://gitlab.com/kicad/code/kicad/issues/5951
2020-10-10 19:32:30 +01:00
fdeb340d21
Defensive code against missing nets.
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Also adds net re-parenting code to Repair Board.
Fixes https://gitlab.com/kicad/code/kicad/issues/5935
2020-10-10 16:54:19 +01:00
90baed7e82
Fix typo of transposed semi-colon and comma.
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Also eases translation of strings while we're here.
Fixes https://gitlab.com/kicad/code/kicad/issues/5933
2020-10-10 12:25:22 +01:00
1fc94c7a2d
Fix printf arg mismatch.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5933
2020-10-09 13:57:49 +01:00
0c7630f8b4
Get rid of wxWidgets assert.
2020-10-09 00:31:29 +01:00
4f2e574f4b
Move IsADiffPair to drc_engine.cpp for now.
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Otherwise we have to include drc_test_provider_diff_pair_coupling.cpp
in CVPCB, which isn't ideal either.
I'll let Tom figure out the best plan going forward, but this should
at least get things compiling/linking again.
2020-10-09 00:05:22 +01:00
6550e01318
Sort synthetic netclass rules by min clearance.
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This way when 'A' and 'B' have different netclasses the largest will
fire (rather than just a random one of the two).
Fixes https://gitlab.com/kicad/code/kicad/issues/5926
2020-10-08 23:41:27 +01:00
b5fa523a11
PCB_EXPR_EVALUATOR: added isDiffPair() API method
2020-10-09 00:01:26 +02:00
5c2c66dd07
drc: sane default rules for via diameters/diff pair widths/diff pair gaps (required by the P&S)
2020-10-09 00:01:26 +02:00
8a7fc7e970
drc: more robust segment pair detection, still issues with approximated arc corners though...
2020-10-07 16:36:37 +02:00
719363fa4a
Factor out class MINOPTMAX<> into a separate header
2020-10-07 16:36:37 +02:00
f620f8bdd3
Report silk/edge collisions.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5854
2020-10-06 13:20:52 +01:00
0751965b2b
Be more responsive to user cancel.
2020-10-05 22:31:52 +01:00
5705859e9e
Remove accidental debug code.
2020-10-05 12:27:21 +01:00
37906511f5
Class renaming.
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DRAWSEGMENT -> PCB_SHAPE
EDGE_MODULE -> FP_SHAPE
TEXTE_PCB -> PCB_TEXT
TEXTE_MODULE -> FP_TEXT
2020-10-05 11:55:33 +01:00
7a4900b8dc
PCB_LINE_T -> PCB_SHAPE_T and PCB_MODULE_EDGE_T -> PCB_FP_SHAPE_T
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Also updated footprint text and zone types for consistencey.
2020-10-04 16:49:04 +01:00
85c6cebd77
Rework silk-to-pad checker to handle all solder mask clipping of silk.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5851
2020-10-04 13:21:01 +01:00
36ceb8075e
Fix logic bug in DRC RTree handler.
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Return value from visitor is whether or not to keep searching, not
whether or not there was a collision.
2020-10-04 13:21:01 +01:00
44580acee2
Clean up some compiler warnings.
2020-10-03 22:55:34 +01:00
400c15b8eb
Add mils to units, remove useMils variables
2020-10-03 20:06:56 +00:00
3144bab36f
final cleanup about removing useless include
2020-10-03 16:40:36 +02:00
0b23cb7dbb
more cleanup about removing useless include
2020-10-03 15:26:03 +02:00
bea5914726
Make sure all DRC paths check for via/pad being flashed on layer.
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Fixes https://gitlab.com/kicad/code/kicad/issues/5830
2020-10-03 14:20:19 +01:00
e76736b7bf
Fix a few Coverity warnings
2020-10-03 12:47:41 +02:00
5ef1dc17ad
drc: ignore silk2pad/silk2silk violations for hidden text objects
2020-10-02 21:06:52 +02:00
ca8aca6faa
drc: implement DRC_RTREE::CheckColliding
2020-10-02 21:06:52 +02:00
8eb9d34aad
drc: silk to silk clerance test should not report errors for hidden text
2020-10-01 18:55:53 +02:00
aee16efe32
drc: LVS test should not throw an error if running in no-project mode
2020-10-01 18:55:53 +02:00
Jeff Young
Ian McInerney
Werni
jean-pierre charras
Marek Roszko
David Shah
Seth Hillbrand
Wayne Stambaugh
Jon Evans
Tomasz Wlostowski
Mikolaj Wielgus