Commit Graph

91 Commits

Author SHA1 Message Date
Mikolaj Wielgus b225e53135 Sim QA: Test raw model with fewer pins than its symbol 2022-09-02 16:42:15 +02:00
Mikolaj Wielgus 121fad63ab Sim QA: Add Directives test
This test checks whether Spice directives placed in schematics as text
objects are properly included in the generated Spice netlist.
2022-08-31 09:41:35 +02:00
Mikolaj Wielgus bd6c153ad9 Sim: Implement "enum" model parameters for switches
Displayed in Sim Model Dialog parameter grid as a dropdown
(wxEnumProperty).
2022-08-30 09:45:49 +02:00
Mikolaj Wielgus 385e5deaaa Add Switches sim QA test
Tests voltage switches. Current switches will be tested as well once
they're fixed to work with .probe alli command in Ngspice.
2022-08-29 04:30:21 +02:00
Jon Evans ae6a2a6443 ADDED: Database libraries MVP
Allows placing parts from an external database that reference symbols from another loaded library.

Includes:
- nanodbc wrapper
- database schematic library plugin
- basic tests

Fixes https://gitlab.com/kicad/code/kicad/-/issues/7436
2022-08-26 10:51:13 -04:00
Mikolaj Wielgus 103b8a0d2c Update the Opamp test to use a symbol with unordered pins 2022-08-26 04:36:48 +02:00
Mikolaj Wielgus c6defadb78 Add Fliege filter Spice netlist exporter test
Which we use to test multi-part symbols, as Fliege filter has two op
amps.
2022-08-25 08:47:31 +02:00
Mikolaj Wielgus 8a6a0ff7dc Allow inferred voltage/current sources to have a single float in Value
Update Opamp test to use this feature.
2022-08-24 06:19:38 +02:00
Seth Hillbrand b9461f2ba7 Re-enable tests for zones
Avoid invalid substantial checks triggered by signed floating point
zeros.  Adds a QA check to ensure zone-self checks are maintained
2022-08-18 17:06:29 -07:00
Mikolaj Wielgus b6f6d1ef81 Sim QA: Add legacy_opamp test to check legacy subckt fields
In particular, Spice_Node_Sequence needed some additional coverage.
2022-08-11 21:23:05 +02:00
Mikolaj Wielgus c669d55eb8 Sim QA: Use uopamp_lvl2 instead of uopamp_lvl1 in Opamp test 2022-08-11 18:32:20 +02:00
jean-pierre charras cc1e99ff5d QA test: annotate rlc.kicad_sch. only annotated schematic give reliable result. 2022-08-10 11:16:07 +02:00
Mikolaj Wielgus 128fedec1a Sim QA: Commit the missing rlc unit test project 2022-08-08 22:05:15 +02:00
Mikolaj Wielgus f6771ed789 Sim QA: Add rlc project to test RLC ideal model inference 2022-08-08 17:06:50 +02:00
Mikolaj Wielgus 9e7bc585ef Sim QA: Test only specific hardcoded points of the results
We don't want to assume Ngspice results to be very deterministic.
2022-08-04 21:07:43 +02:00
Mikolaj Wielgus 800b512fe8 Further cut off digits down to one after period in sim QA
We just want to make sure our netlist exporter works. Being
deterministic is the simulator's job, not ours, though perhaps we should
investigate that too eventually.
2022-08-03 16:25:00 +02:00
Mikolaj Wielgus 37209bb496 Try to fix Ngspice QA by resampling and cutting off value digits
`linearize` command resamples the data. Fourth and further digits from
decimal point are cut off by using `wrdata` command instead of `write`.
Oddly, "sources" unit test is not working (so it's still uncommented) --
some substantially different values are generated when generating the
reference with standalone Ngspice.
2022-08-03 14:28:01 +02:00
Jeff Young cc78997386 Add annular ring test and fix footprint/pad mismatch in other test. 2022-08-01 21:50:35 +01:00
Jeff Young 203d778c92 Fix test failure. 2022-08-01 21:42:02 +01:00
Jeff Young 0304ad4494 Move connection width testing to rule system.
Also copies connection width progress reporting architecture over to
the sliver checker.
2022-08-01 13:09:51 +01:00
Mikolaj Wielgus d7e5254c17 Comment out failing sim QA tests
The tests will probably have to test against manually specified bounds
and inexact points.

Added a previously mistakenly uncommitted cmos_not.csv.
2022-07-30 09:19:20 +02:00
Mikolaj Wielgus 7cf5138c63 Sim: Bugfixes, mostly for MS Windows compilation errors
Unfortunately, Windows headers define a lot of macros for common words,
so we had to rename some enums to not collide.

We also fix some of the many bugs related to the new simulation
architecture and the Spice Model Editor dialog.
2022-07-30 02:25:34 +00:00
Mikolaj Wielgus 739b9255d9 Sim Model Editor improvements
- Tab-switching,
- Automatic expansion of categories on tab-switch,
- Various minor simulation improvements,
- Various new simulation-related bugfixes.
2022-07-30 02:25:34 +00:00
Mikolaj Wielgus 6984f63af8 Sim: Transmission line models
Implement transmission line models and perform some adjustments to
the current models. Add some QA tests.
2022-07-30 02:25:34 +00:00
Mikolaj Wielgus fe38c622a9 Sim: Improvements to model serialization
Don't serialize parameters in certain models for default values. Infer
models from Value field for some kinds of models. Resolve synonyms when
loading models from Spice libraries.
2022-07-30 02:25:34 +00:00
Mikolaj Wielgus 6450ec6b85 Sim: Spice netlist exporter rewrite
Rewrite the spice exporter to work with the new simulation model
architecture and data model, with many bugfixes related to the latter
two along the way.
2022-07-30 02:25:34 +00:00
luz paz 79fa911e0e Fix various typos
Found via `codespell -q 3 -S *.po,./thirdparty,./Documentation/changelogs -L aactual,acount,aline,alocation,alog,anormal,anumber,aother,apoints,aparent,aray,ba,busses,dout,einstance,leaded,modul,ontext,ot,overide,serie,te,,tesselate,tesselator,tht`
2022-07-21 16:31:41 +00:00
Seth Hillbrand 3081023b5e ADDED: Minimum copper connection width DRC check
Checks all copper connections in each net/layer for minimum width
setting.

Fixes https://gitlab.com/kicad/code/kicad/issues/9870
2022-07-11 19:26:56 +00:00
Jeff Young ce4cedb5b4 Regression test case for 11814. 2022-06-15 11:45:29 +01:00
Jeff Young 09c9bc3037 Fix net ordering in gold file. 2022-05-27 21:28:17 +01:00
Jeff Young e9e1878d96 Attempt to fix eeschema tests.
(Slashes in netnames must be escaped or else we think they're path
separators.)
2022-05-27 17:53:11 +01:00
Roberto Fernandez Bautista 55f22c526a Fix annotation of incomplete multi-unit symbols and re-annotation of duplicates
Fixes https://gitlab.com/kicad/code/kicad/-/issues/11496
2022-05-26 09:23:36 +00:00
Jeff Young 4cd48cd5c9 Fix some test issues. 2022-04-23 22:15:39 +01:00
Jeff Young 2663ad5340 Implement Eagle text variables.
Also fixes two bugs:
1) subsequent text items that are marked >NAME or >VALUE will now get
imported as text items with ${REFERENCE} or ${VALUE} (instead of overwriting
the previous text item)

2) we no longer (accidentally) capitalize all text items.

Fixes https://gitlab.com/kicad/code/kicad/issues/11321
2022-04-10 17:29:47 +01:00
jean-pierre charras 5e52539939 eagle importer: fix incorrect conversion UTF8/wxString.
When importing a eagle board file using wxXmlDocument, the strings in eagle BOARD
(UTF8 encoded) are correctly converted to wxString (using unicode wide chars)
So trying to reconvert these strings using FROM_UTF8( <wxString>.c_str() )
is incorrect and can break initial string if non ASCII7 chars are found
2022-04-09 15:33:01 +02:00
Thomas Pointhuber bd18e340f4 eagle: introduce *.lbr footprint import test
Bugs found but not fixed yet:
* Reference and Value are not converted correctly yet
  * HOTFIX: test commented out
* GP3906-TLP and UBLOX_ZOE_M8-0-10 are not able to import the description again
  * HOTFIX: description removed from gold file
2022-04-02 20:07:16 +02:00
Thomas Pointhuber 056748e0df altium: Add testcase to verify that "PCB Binary Version 5.0" is also supported 2022-04-02 18:17:19 +02:00
Thomas Pointhuber 406c528ab7 altium: Create region for items on the KEEP_OUT_LAYER and use new Track unit-tests 2022-04-02 18:17:19 +02:00
Sylwester Kocjan 3da47e6123 qa: move pcbnew data to appropriate directory 2022-03-30 11:13:23 +00:00
Sylwester Kocjan cfb8fbc644 qa: move eeschema data to appropriate directory 2022-03-30 11:13:23 +00:00
jean-pierre charras f3be3a5762 test: update test files to fix DRC issues after changing the text position algo. 2022-03-30 10:56:16 +02:00
jean-pierre charras 93066004f1 QA: fix altium qa tests now the altium to pcbnew coordiantes are rounded
to the near 10nm value.
2022-03-24 12:36:46 +01:00
Jeff Young d65019e280 Update tests. 2022-03-15 00:37:44 +00:00
Thomas Pointhuber 1831ae6fa4 altium: Fix test due to keepout restrictions parse changes 2022-03-12 09:59:57 +01:00
jean-pierre charras 4ad89b9c04 Fix qa tests after fix made in commit 878c70c1 2022-03-09 17:18:54 +01:00
Thomas Pointhuber a9ebb42ecd altium: Parse keepout restrictions of tracks 2022-03-07 19:58:43 +01:00
Seth Hillbrand 9d927f3135 Check for additional connections between tracks
Prevents removal when a track is connected not just to other tracks but
also other connected items

Fixes https://gitlab.com/kicad/code/kicad/issues/10916
2022-03-03 12:07:20 -08:00
Thomas Pointhuber 52a2d52bf0 altium: Parse solder and paste mask settings of tracks and arcs 2022-02-20 20:18:40 +01:00
Thomas Pointhuber 86c025eb30 altium: Fix parsing of zones which use the KEEP_OUT_LAYER 2022-02-19 14:37:05 +01:00
Seth Hillbrand a19d9105f0 Fix SolderBridge check to only check across multiple
We should not generate an error when overlapping a single copper element
with a soldermask that is not associated with copper.

Fixes https://gitlab.com/kicad/code/kicad/issues/10906
2022-02-18 11:47:28 -08:00