Jeff Young
a0a368f47b
Fix bogus value field in spice test source.
2024-05-10 15:58:48 +01:00
Marek Roszko
c009328c07
Undo accidental commit from some time ago (woops)
2023-07-16 21:54:09 -04:00
Jeff Young
35ca3e7264
Add regression test for 13988.
2023-03-25 12:45:36 +00:00
jean-pierre charras
07f79208b9
Minor fixes: Coverity and compil minor warnings.
2023-02-18 13:04:43 +01:00
Jeff Young
5c45b53f88
Rollback testing changes that were accidentally checked in.
2023-02-11 21:11:07 +00:00
Jeff Young
bc108023b3
ADDED operating point overlay for SCH_EDIT_FRAME.
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Fixes https://gitlab.com/kicad/code/kicad/issues/11253
2023-02-11 21:11:07 +00:00
Jeff Young
2a5bb71fbd
ADDED operating point text variables for labels and symbols.
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ADDED formatting for cursors and operationg points
Also fixes a bunch of bugs to make the new cursors work with .ac sims.
Fixes https://gitlab.com/kicad/code/kicad/issues/11253
Fixes https://gitlab.com/kicad/code/kicad/issues/6965
2023-02-11 21:11:07 +00:00
jean-pierre charras
f6d9a2574b
Fix a QA simulation test on W1/msys2:
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- Gives a bigger relative tolerance when comparing 2 values to pass some tests
- Fix error in test_sim_regressions.cpp for 3 TestNetlist() calls
2023-01-22 16:52:11 +01:00
Jeff Young
a3a2e2e5b1
Update demos and legacy qa files SpiceMapping -> Spice_Node_Sequence.
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Also removes migration in the code as it will no longer be needed.
2022-12-19 12:04:53 +00:00
Mikolaj Wielgus
b025b103de
Sim Model Editor: Make the VBIC model the first BJT model to select
2022-11-29 10:13:20 +01:00
Mikolaj Wielgus
484620eeb5
Sim QA: Add test for VDMOS
2022-11-29 09:48:01 +01:00
Mikolaj Wielgus
5fb191e4d6
Sim QA: Test all BJT parameters in each model
2022-11-28 09:49:48 +01:00
Mikolaj Wielgus
26644952a4
Sim QA: Test all diode parameters
2022-11-28 08:01:50 +01:00
Mikolaj Wielgus
f2fb734e06
Sim QA: Add test for Numparam expressions inside .subckt
2022-11-27 06:32:17 +01:00
Mikolaj Wielgus
08d37d2795
Sim QA: Add Spice .subckt parsing tests
2022-11-26 10:24:11 +01:00
Mikolaj Wielgus
9766351ee6
Sim: Update QA to tests to match the new model upgrade scheme
2022-11-25 05:38:21 +01:00
Mikolaj Wielgus
833146cf50
Sim QA: Fix QA errors
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Let's not allow units in fields for now. (is 1m one meter or one milli?)
2022-11-22 21:18:01 +01:00
Mikolaj Wielgus
e9fe59a28c
Sim: Rename the missed Sim_* fields to Sim.*
2022-11-21 03:33:11 +01:00
Mikolaj Wielgus
059ca8fc48
Sim: Rename Sim_* fields to Sim.*
2022-11-20 03:37:54 +01:00
Mikolaj Wielgus
e7c43ca20a
Sim: Remove inference from Reference and Value
2022-11-18 08:39:15 +01:00
Mikolaj Wielgus
5eca8dd8de
Undo hardcoding swapping of diode pins
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Revert commits d1e2acd3
70b4d1aa
cff508fb
2022-10-30 11:01:59 +01:00
Mikolaj Wielgus
cff508fb3b
Sim: Reverse diode model pin order to match diode symbols
2022-10-28 14:01:09 +02:00
Mikolaj Wielgus
f31feaac42
Sim: Commit forgotten files
2022-10-27 08:08:14 +02:00
Mikolaj Wielgus
00c04e74ed
Sim QA: Test LTspice parameters and ako models of BJTs
2022-10-20 04:00:33 +02:00
Mikolaj Wielgus
c4fc9c1b16
Sim QA: Add tests for AKO and LTspice diodes
2022-10-19 06:56:21 +02:00
Mikolaj Wielgus
42acabb5a9
Fix a mistake in uopamp.lib.spice
2022-10-18 22:38:49 +02:00
Mikolaj Wielgus
ae671c07e1
Commit missing uopamp.lib.spice
2022-10-18 17:38:23 +02:00
Mikolaj Wielgus
e5704d7058
Update uopamp.lib.spice to be the same in all QA tests
2022-10-18 06:15:54 +02:00
Mikolaj Wielgus
c8e13813d9
Sim: Rename Sim_Disabled field to Sim_Enable
2022-10-16 00:49:44 +02:00
Mikolaj Wielgus
c3d5b3b3e5
Sim: Only store device type in reference, not full model type
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Instead of Reference="VSIN1", Value="dc=1 ampl=2 f=3", it's now
Reference="V1", Value="SIN dc=1 ampl=2 f=3".
2022-10-15 19:36:26 +02:00
Mikolaj Wielgus
0e0d1a34f5
Sim: Spice grammar fixes
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- Fix parsing .model lines with model names containingnon-alphanumeric
characters like - and _,
- Fix parsing libraries in which EOF is not preceded by a newline.
Fixes https://gitlab.com/kicad/code/kicad/issues/12394
2022-09-12 04:05:17 +02:00
Mikolaj Wielgus
e56635a02b
Sim: Add mutual inductor model
2022-09-11 19:23:01 +02:00
Mikolaj Wielgus
b225e53135
Sim QA: Test raw model with fewer pins than its symbol
2022-09-02 16:42:15 +02:00
Mikolaj Wielgus
121fad63ab
Sim QA: Add Directives test
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This test checks whether Spice directives placed in schematics as text
objects are properly included in the generated Spice netlist.
2022-08-31 09:41:35 +02:00
Mikolaj Wielgus
bd6c153ad9
Sim: Implement "enum" model parameters for switches
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Displayed in Sim Model Dialog parameter grid as a dropdown
(wxEnumProperty).
2022-08-30 09:45:49 +02:00
Mikolaj Wielgus
385e5deaaa
Add Switches sim QA test
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Tests voltage switches. Current switches will be tested as well once
they're fixed to work with .probe alli command in Ngspice.
2022-08-29 04:30:21 +02:00
Mikolaj Wielgus
103b8a0d2c
Update the Opamp test to use a symbol with unordered pins
2022-08-26 04:36:48 +02:00
Mikolaj Wielgus
c6defadb78
Add Fliege filter Spice netlist exporter test
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Which we use to test multi-part symbols, as Fliege filter has two op
amps.
2022-08-25 08:47:31 +02:00
Mikolaj Wielgus
8a6a0ff7dc
Allow inferred voltage/current sources to have a single float in Value
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Update Opamp test to use this feature.
2022-08-24 06:19:38 +02:00
Mikolaj Wielgus
b6f6d1ef81
Sim QA: Add legacy_opamp test to check legacy subckt fields
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In particular, Spice_Node_Sequence needed some additional coverage.
2022-08-11 21:23:05 +02:00
Mikolaj Wielgus
c669d55eb8
Sim QA: Use uopamp_lvl2 instead of uopamp_lvl1 in Opamp test
2022-08-11 18:32:20 +02:00
jean-pierre charras
cc1e99ff5d
QA test: annotate rlc.kicad_sch. only annotated schematic give reliable result.
2022-08-10 11:16:07 +02:00
Mikolaj Wielgus
128fedec1a
Sim QA: Commit the missing rlc unit test project
2022-08-08 22:05:15 +02:00
Mikolaj Wielgus
f6771ed789
Sim QA: Add rlc project to test RLC ideal model inference
2022-08-08 17:06:50 +02:00
Mikolaj Wielgus
9e7bc585ef
Sim QA: Test only specific hardcoded points of the results
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We don't want to assume Ngspice results to be very deterministic.
2022-08-04 21:07:43 +02:00
Mikolaj Wielgus
800b512fe8
Further cut off digits down to one after period in sim QA
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We just want to make sure our netlist exporter works. Being
deterministic is the simulator's job, not ours, though perhaps we should
investigate that too eventually.
2022-08-03 16:25:00 +02:00
Mikolaj Wielgus
37209bb496
Try to fix Ngspice QA by resampling and cutting off value digits
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`linearize` command resamples the data. Fourth and further digits from
decimal point are cut off by using `wrdata` command instead of `write`.
Oddly, "sources" unit test is not working (so it's still uncommented) --
some substantially different values are generated when generating the
reference with standalone Ngspice.
2022-08-03 14:28:01 +02:00
Mikolaj Wielgus
d7e5254c17
Comment out failing sim QA tests
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The tests will probably have to test against manually specified bounds
and inexact points.
Added a previously mistakenly uncommitted cmos_not.csv.
2022-07-30 09:19:20 +02:00
Mikolaj Wielgus
7cf5138c63
Sim: Bugfixes, mostly for MS Windows compilation errors
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Unfortunately, Windows headers define a lot of macros for common words,
so we had to rename some enums to not collide.
We also fix some of the many bugs related to the new simulation
architecture and the Spice Model Editor dialog.
2022-07-30 02:25:34 +00:00
Mikolaj Wielgus
739b9255d9
Sim Model Editor improvements
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- Tab-switching,
- Automatic expansion of categories on tab-switch,
- Various minor simulation improvements,
- Various new simulation-related bugfixes.
2022-07-30 02:25:34 +00:00