cortexm: Restrict probing by using the ap_designer.
More designers need to be observed and reported by users and added. Request users to send needed data.
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@ -204,7 +204,7 @@ static const struct {
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{0x4c4, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("Cortex-M4 ROM", "(Cortex-M4 ROM)")},
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{0x4c7, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("Cortex-M7 PPB", "(Private Peripheral Bus ROM Table)")},
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{0x906, 0x14, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight CTI", "(Cross Trigger)")},
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{0x907, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight ETB", "(Trace Buffer)")},
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{0x907, 0x21, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight ETB", "(Trace Buffer)")},
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{0x908, 0x12, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight CSTF", "(Trace Funnel)")},
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{0x910, 0x00, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight ETM9", "(Embedded Trace)")},
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{0x912, 0x11, 0, aa_nosupport, cidc_unknown, PIDR_PN_BIT_STRINGS("CoreSight TPIU", "(Trace Port Interface Unit)")},
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@ -87,7 +87,17 @@
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#define ADIV5_AP_IDR ADIV5_AP_REG(0xFC)
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/* Known designers seen in SYSROM-PIDR. Ignore Bit 7 from the designer bits*/
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#define AP_DESIGNER_FREESCALE 0x00e
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#define AP_DESIGNER_TEXAS 0x017
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#define AP_DESIGNER_ATMEL 0x01f
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#define AP_DESIGNER_STM 0x020
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#define AP_DESIGNER_CYPRESS 0x034
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#define AP_DESIGNER_INFINEON 0x041
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#define AP_DESIGNER_NORDIC 0x244
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#define AP_DESIGNER_ARM 0x43b
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/*LPC845 with designer 501. Strange!? */
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#define AP_DESIGNER_SPECULAR 0x501
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#define AP_DESIGNER_ENERGY_MICRO 0x673
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/* AP Control and Status Word (CSW) */
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#define ADIV5_AP_CSW_DBGSWENABLE (1u << 31)
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@ -1,9 +1,9 @@
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/*
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* This file is part of the Black Magic Debug project.
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*
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* Copyright (C) 2012 Black Sphere Technologies Ltd.
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* Copyright (C) 2012-2020 Black Sphere Technologies Ltd.
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* Written by Gareth McMullin <gareth@blacksphere.co.nz>,
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* Koen De Vleeschauwer and Uwe Bonne
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* Koen De Vleeschauwer and Uwe Bonnes
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -35,6 +35,7 @@
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#include "cortexm.h"
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#include "platform.h"
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#include "command.h"
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#include "gdb_packet.h"
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#include <unistd.h>
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@ -375,28 +376,62 @@ bool cortexm_probe(ADIv5_AP_t *ap)
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#define PROBE(x) \
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do { if ((x)(t)) {target_halt_resume(t, 0); return true;} else target_check_error(t); } while (0)
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PROBE(stm32f1_probe);
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PROBE(stm32f4_probe);
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PROBE(stm32h7_probe);
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PROBE(stm32l0_probe); /* STM32L0xx & STM32L1xx */
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PROBE(stm32l4_probe);
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PROBE(lpc11xx_probe);
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PROBE(lpc15xx_probe);
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PROBE(lpc43xx_probe);
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PROBE(lpc546xx_probe);
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PROBE(sam3x_probe);
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PROBE(sam4l_probe);
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PROBE(nrf51_probe);
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PROBE(samd_probe);
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PROBE(samx5x_probe);
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PROBE(lmi_probe);
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PROBE(kinetis_probe);
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PROBE(efm32_probe);
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PROBE(msp432_probe);
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PROBE(ke04_probe);
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PROBE(lpc17xx_probe);
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switch (ap->ap_designer) {
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case AP_DESIGNER_FREESCALE:
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PROBE(kinetis_probe);
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break;
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case AP_DESIGNER_STM:
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PROBE(stm32f1_probe);
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PROBE(stm32f4_probe);
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PROBE(stm32h7_probe);
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PROBE(stm32l0_probe);
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PROBE(stm32l4_probe);
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break;
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case AP_DESIGNER_CYPRESS:
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DEBUG_WARN("Unhandled Cypress device\n");
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break;
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case AP_DESIGNER_INFINEON:
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DEBUG_WARN("Unhandled Infineon device\n");
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break;
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case AP_DESIGNER_NORDIC:
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PROBE(nrf51_probe);
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break;
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case AP_DESIGNER_ATMEL:
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PROBE(sam4l_probe);
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PROBE(samd_probe);
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PROBE(samx5x_probe);
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break;
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case AP_DESIGNER_ARM:
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if (ap->ap_partno == 0x4c3) /* Care for STM32F1 clones */
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PROBE(stm32f1_probe);
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PROBE(sam3x_probe);
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PROBE(lpc11xx_probe); /* LPC24C11 */
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break;
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case AP_DESIGNER_ENERGY_MICRO:
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PROBE(efm32_probe);
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break;
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case AP_DESIGNER_TEXAS:
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PROBE(msp432_probe);
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break;
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case AP_DESIGNER_SPECULAR:
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PROBE(lpc11xx_probe); /* LPC845 */
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break;
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default:
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#if PC_HOSTED == 0
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gdb_outf("Please report Designer %3x and Partno %3x and the probed "
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"device\n", ap->ap_designer, ap->ap_partno);
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#else
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DEBUG_WARN("Please report Designer %3x and Partno %3x and the probed "
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"device\n", ap->ap_designer, ap->ap_partno);
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#endif
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PROBE(lpc11xx_probe); /* Let's get feedback if LPC11 is also Specular*/
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PROBE(lpc15xx_probe);
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PROBE(lpc43xx_probe);
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PROBE(lmi_probe);
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PROBE(ke04_probe);
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PROBE(lpc17xx_probe);
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}
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#undef PROBE
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return true;
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}
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@ -137,7 +137,7 @@ lpc11xx_probe(target *t)
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target_add_commands(t, lpc11xx_cmd_list, "LPC8N04");
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return true;
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}
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if (idcode) {
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if ((t->t_designer != AP_DESIGNER_SPECULAR) && !idcode) {
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DEBUG_INFO("LPC11xx: Unknown IDCODE 0x%08" PRIx32 "\n", idcode);
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}
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idcode = target_mem_read32(t, LPC8XX_DEVICE_ID);
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