sys64738
/
blackmagic
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

stm32g0: Made the flash write routine a little more understandable

This commit is contained in:
dragonmux 2022-08-09 22:11:43 +01:00 committed by Piotr Esden-Tempski
parent 23cf81eb55
commit d6c1d8a1cc
1 changed files with 11 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
src/target/stm32g0.c
View File

@ -407,7 +407,7 @@ static int stm32g0_flash_write(target_flash_s *f, target_addr dest, const void *
target *const t = f->t;
stm32g0_priv_s *ps = (stm32g0_priv_s *)t->target_storage;
if ((dest >= (target_addr)FLASH_OTP_START) && !ps->irreversible_enabled) {
if (dest >= FLASH_OTP_START && !ps->irreversible_enabled) {
tc_printf(t, "Irreversible operations disabled\n");
stm32g0_flash_op_finish(t);
return -1;
@ -418,25 +418,25 @@ static int stm32g0_flash_write(target_flash_s *f, target_addr dest, const void *
target_mem_write32(t, FLASH_CR, FLASH_CR_PG);
target_mem_write(t, dest, src, len);
/* Wait for completion or an error */
uint32_t flash_sr;
do {
flash_sr = target_mem_read32(t, FLASH_SR);
uint32_t status = FLASH_SR_BSY_MASK;
while (status & FLASH_SR_BSY_MASK) {
status = target_mem_read32(t, FLASH_SR);
if (target_check_error(t)) {
DEBUG_WARN("stm32g0 flash write: comm error\n");
stm32g0_flash_op_finish(t);
return -1;
}
} while (flash_sr & FLASH_SR_BSY_MASK);
}
if (flash_sr & FLASH_SR_ERROR_MASK) {
DEBUG_WARN("stm32g0 flash write error: sr 0x%" PRIx32 "\n", flash_sr);
if (status & FLASH_SR_ERROR_MASK) {
DEBUG_WARN("stm32g0 flash write error: sr 0x%" PRIx32 "\n", status);
stm32g0_flash_op_finish(t);
return -1;
}
if ((dest == (target_addr)FLASH_START) && target_mem_read32(t, FLASH_START) != 0xFFFFFFFF) {
uint32_t flash_acr = target_mem_read32(t, FLASH_ACR);
flash_acr &= ~(uint32_t)FLASH_ACR_EMPTY;
target_mem_write32(t, FLASH_ACR, flash_acr);
if (dest == FLASH_START && target_mem_read32(t, FLASH_START) != 0xFFFFFFFF) {
const uint32_t acr = target_mem_read32(t, FLASH_ACR) & ~FLASH_ACR_EMPTY;
target_mem_write32(t, FLASH_ACR, acr);
}
stm32g0_flash_op_finish(t);