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23 Commits

Author SHA1 Message Date
Uwe Bonnes f234074099 stm32h7: Start of support. 
Implement probe, memory map, erase, write, uid, crc, parallelism.
 2018-07-27 10:59:54 +02:00
Uwe Bonnes 139707c5c0 cortexm/detach: Add a dummy transaction after cleaning DHCSR. 
This replaces the seemingly superflous swdptap_seq_out() at
the end of adiv5_swdp_low_access() needed to continue after detach.
 2018-07-19 10:57:41 +02:00
Gareth McMullin b2defad844
Merge pull request #356 from UweBonnes/probe_halted 
Probe halted
 2018-06-21 10:06:56 -07:00
Uwe Bonnes 54f73858f9 Provide a target function to write with given size. 2018-06-16 13:30:08 +02:00
Uwe Bonnes 17b817f37b cortexm: Allow to set timeout to wait for halt. 
This allows to gain access to devices spending long time in WFI without
the need for a reset, at the expense of possible long waiting times.
Using Reset means loosing the device runtime context.
 2018-06-13 14:03:50 +02:00
Uwe Bonnes 9e365a58f7 Cortex-M: Try harder to halt devices in WFI. 
E.g. STM32F7 and L0 need multiple C_DEBUG and C_HALT commands to halt
the device.
 2018-06-13 14:02:43 +02:00
newbrain ae6f0eadc9 Support for MSP432 TI MCUs (#353) 
Introduces flashing and debugging support for Texas Instruments MSP432
series of MCUs
 2018-06-07 08:34:21 +12:00
Gareth McMullin cfaa5ea963 Merge branch 'korken89-master' 2018-03-27 13:01:06 +13:00
Gareth McMullin 76bfb4929d Use lowercase register names. 2018-03-27 13:00:39 +13:00
Akila Ravihansa Perera 471ce2547c Added LPC17xx support (#317) 2018-03-25 12:53:30 -07:00
Emil Fresk 1ee6d4503e Update to split 'special' into its sane parts (update from @mubes) 2018-03-24 16:44:59 +01:00
Gareth McMullin c53a12bfd1 cortexm: Better cache support for Cortex-M7 
- On probe, read CTR for cache presence and minimum line length
- Make D-Cache clean a function
- Clean before memory reads
- Clean and invalidate before memory writes
- Flush all I-Cache before resume
 2017-10-12 09:26:01 +13:00
Nick Downing 0e5b3ab00e Make Cortex M driver write DCCIMVAC (Data cache clean and invalidate by address to the PoC=Point of Coherency) prior to reading or writing each 32 bytes of RAM 2017-10-12 08:41:58 +13:00
Stefan Agner 3c06396c8e Constify strings and constant structs 2017-04-22 13:50:04 -07:00
Gareth McMullin e4de689a09 cortexm: Check halt reason on stub exit. 2017-04-12 11:37:42 +12:00
Chuck McManis 085c980215 Remove EXTENDED_RESET define 2016-12-04 13:51:27 -08:00
Chuck McManis a3c2592e44 Review feedback 2016-12-04 13:15:45 -08:00
Chuck McManis 0aef6c6774 SAM4L: Add extended reset to target interface 
This adds a new function to the internal target interface
to allow the target to get control before reset is complete
so that it can do any additional work. On this target there
is a proprietary internal bit that has to be reset in some
cases to allow the core to continue operating.
 2016-12-02 00:08:21 -08:00
Gareth McMullin 9a8cef04e0 Clean up debug format strings. 2016-09-29 21:31:18 -07:00
Gareth McMullin 9aacc18f60 target: Restructure internal break/watch handling. 
cortexa: Implement soft breakpoints.
 2016-07-13 08:31:09 +12:00
Gareth McMullin 9136cf4c98 target: target_halt_wait and target_check_hw_wp replaced with target_halt_poll. 
The new function returns a stop reason which must be translated in gdb server.
In the case of a watchpoint hit, the address is returned by a pointer parameter.
Simplify the extenal interface for set/clear breaki-/watchpoints.
 2016-07-13 08:31:09 +12:00
Gareth McMullin aeaca988c3 target: Use new target_addr type consistently in external interface. 
Flash routines still use uint32_t internally.
 2016-07-13 08:31:09 +12:00
Gareth McMullin b494279fe5 Move target files into separate directory. 2016-07-13 08:31:09 +12:00
Renamed from src/cortexm.c (Browse further)