b494279fe5
Move target files into separate directory.
2016-07-13 08:31:09 +12:00
b644724520
Overhaul of semihosting. Remove dependence of target on gdb_packet.
2016-07-13 08:31:09 +12:00
9b8e2c3ad1
target: Replace all calls to gdb_out with new tc_printf.
2016-07-13 08:31:09 +12:00
5c5f76d60e
target: Remove last accesses to private structure from outside.
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Only include target_internal.h from inside target files.
2016-07-13 08:31:09 +12:00
07f27d1b70
Hide target list internals form command.c
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Remove unused support for extended target structure size.
2016-07-13 08:31:09 +12:00
4addec0a21
lpc15xx support
2016-07-05 16:53:47 -04:00
8b4342394f
Overhaul of timeouts so they may be nested.
2016-06-28 14:35:43 +12:00
60f3be501e
Pass breakpoint length to target.
2016-04-19 13:24:05 -07:00
459bae4ea1
ADIv5 structural changes.
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- Probe ROM table
- Mem-AP no longer pretends to be a target
- AP no longer provides priv pointer
2016-04-19 13:24:05 -07:00
cd1d72257f
Cleanup of SRST handling.
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- Remove connect_assert_srst global.
- Attach functions always release reset.
- Platforms provide a method to poll the reset pin.
- Reset on scan is all internal to command.c
- Reset is released on a failed scan. Fixes #111
2016-04-19 13:12:16 -07:00
987a926a19
Fixes to allow building for Windows.
2016-04-15 12:58:36 -07:00
fa7cccff23
[efm32] Formatting fixes
2015-11-14 14:56:03 +00:00
07f7571dd1
Add basic support for EFM32/EZR32 chips
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Tested with EZR32LG230
2015-10-23 19:58:44 +01:00
7e5a664df9
Merge pull request #98 from UweBonnes/stm32l4
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Add STM32L4 handling. No option write handling yet.
2015-09-01 11:01:36 +12:00
f7492d93be
Cortex-M: Detect and handle flash patch revision.
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According to ARM v7-M Architecture Reference Manual
ARM DDI 0403E.b (ID120114)
2015-08-22 13:01:24 +02:00
2336a313e4
Add STM32L4 handling. No option write handling yet.
2015-08-22 12:59:56 +02:00
9009ed6581
cortexm: Add target option to inhibit assersion of SRST.
2015-04-11 16:08:59 -07:00
cd5d569d38
lpc: Reduce differences between lpc11xx and lpc43xx code.
2015-04-11 16:05:40 -07:00
865beaba98
Suppress warning about longjmp clobbering local variable.
2015-04-02 21:06:18 -07:00
c2cde32716
Improve cortexm_read/write_regs. Use more sensible return types.
2015-03-29 17:37:03 -07:00
274b818517
Make cortexm_pc_write static.
2015-03-29 16:48:51 -07:00
31fae032f7
cortexm: Separate stub loading from running.
2015-03-29 15:20:00 -07:00
1e54139f4a
target: Remove pc_read/pc_write methods.
2015-03-28 20:15:33 -07:00
f74def3552
Remove old STM32L1 driver.
2015-03-26 20:47:57 -07:00
64c79e1d03
Consistently name target var 't' in cortexm.
2015-03-26 20:47:57 -07:00
5ab8564ff6
Clean up handling of lost targets using new exceptions mechanism.
2015-03-22 14:05:12 -07:00
d6225eec76
Raise timeout exception when target is in WFI.
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Ignore the exception when polling for halt, and report the exception
to the user if halting the target fails.
Remove old allow_timeout flag in DP struct that's no longer needed.
2015-03-22 12:26:45 -07:00
8ddb186b35
Allow stub to return an error code.
2015-03-19 21:49:09 -07:00
c2462a6788
Add cortexm generic stub call, and use in stm32f1 driver.
2015-03-19 07:48:47 -07:00
2bf54f9a72
Replace adiv5_ap_mem* functions with inline wrappers to target mem*.
2015-03-15 16:02:09 -07:00
ee3af96a73
Consolidate target_mem_read* and target_mem_write* methods.
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There are now only mem_read and mem_write, that must
handle all alignments. These methods return void, errors must be
checked with target_check_error.
2015-03-15 14:31:57 -07:00
2e785e56fa
adiv5: Encode APnDP into register definition.
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Clean up magic numbers in adiv5 calls.
Removed old adiv5_dp_write_ap and adiv5_dp_read_ap.
2015-03-14 18:03:04 -07:00
6f5b1873d7
Use size_t for sizes in flash functions. Fix all sign compare warnings.
2015-03-14 15:18:22 -07:00
f5c856af3b
Fix pointer sign warnings and remove -Wno-pointer-sign.
2015-03-13 20:35:39 -07:00
e0a8ce5a88
STM32L0x target support.
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Target support for stm32l0's and stm32l1's including option bytes and
data EEPROM. This module will superceed the previous stm32l1 driver.
o Program flash write and erase.
o Options modification and interpretive status.
o Stubs for program flash writes and erases. Stubs are modestly
faster than non-stub version. The stm32l0 will not execute stubs
when the MCU has crashed. A monitor option may be used to force
non-stub flash writes.
o Stubs generated from C++ code and converted to arrays of half-words.
o Writes to data EEPROM supoprted when loading segments.
o EEPROM data monitor command to write words.
o Stubs supported on stm32l1.
2015-03-08 16:17:34 -07:00
4d4813de87
Clean up includes everywhere.
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All source files include general.h first and before anything else.
This inlcludes platform.h and platform_support.h
No header file needs to include to include any of these, but should include
any others needed for it's own declarations.
2015-03-01 22:16:04 -08:00
565795e168
Added support for SAMD10/11/21, and list of tested SAM D devices
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This allows blackmagic to be used with the new Arduino Zero board via
the unpopulated SWD header on the east end of the board.
2015-01-18 22:35:59 +00:00
3726061773
Support for the NVMCTRL Security Bit (PROT=1)
2015-01-18 20:46:26 +00:00
a3ab9b24d1
Avoid repetition of cortexm code in stmd20 driver.
2015-01-18 12:16:17 +13:00
9c5ffd61f7
First cut at Freescale Kinetis support.
2015-01-06 22:26:00 +13:00
a5549d630c
Whitespace cleanup.
2014-10-16 13:50:56 -07:00
9fda010b32
Give up unwinding a fault if reading the stack fails.
2014-09-12 12:24:43 +12:00
945a2802d5
Atmel SAMD20 support
2014-09-03 21:17:41 +12:00
34d0f64529
Nordic nRF51 series support
2014-05-01 15:09:59 +01:00
3077472620
Unwind hardfaults in dual-stack mode.
2014-03-31 20:58:06 +13:00
3cce6f472c
Add support for the SYS_WRITEC semihosting operation.
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This is implemented in the same manner as QEMU semihosting
support, specifically, a SYS_WRITEC results in a single
character write to STDERR.
2013-10-05 13:14:03 +08:00
d8f737fc53
Disable ADIv5 timeout while target is running.
2013-06-19 21:05:53 +12:00
2d63dd4b5b
Fix register array sizes.
2013-06-17 15:52:15 +12:00
df32aad757
semihosting: improve handling of console I/O
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This implements special handling for SYS_OPEN to catch requests for
":tt" which is reserved by ARM for console input/output. They're
mapped to the appropriate GDB file descriptors automatically.
An additional file handle offset is introduced because ARM doesn't
consider zero handle to be valid.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
2013-05-18 15:33:58 +12:00
5020d1f05d
Move semihosting support to cortexm.c.
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Try to implement more syscalls.
2013-05-18 15:33:58 +12:00
Gareth McMullin
David Lawrence
Richard Meadows
Uwe Bonnes
Marc Singer
Mike
Benno Leslie
Paul Fertser
Gareth McMullin