Commit Graph

1712 Commits

Author SHA1 Message Date
Frank Kunz 8def28dee9 Add option bit support for STM32WLxx
Support for read/write/erase option bits.

Signed-off-by: Frank Kunz <mailinglists@kunz-im-inter.net>
2022-01-02 12:29:03 +01:00
Sean Cross c832cb04e7 samd: add support for SAMD09
The SAMD09 CPU is used in boards such as the Adafruit Seesaw. It has a
smaller amount of memory and flash than other SAMD ports.

This was tested with an Adafruit Seesaw. These boards come with preloaded
firmware. As a test, the firmware was dumped and flash was erased. Then,
flash was verified to be all zeroes. Finally, the firmware was loaded
back in:

	(gdb) p/x *(unsigned int *)0@32
	$8 = {0x20000f88, 0x1db, 0x1d1, 0x1d9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x1d9, 0x0, 0x0, 0xf5, 0x1081, 0x1d9, 0x1d9, 0x1d9, 0x1d9, 0x1d9, 0x1d9, 0x1d9, 0x0, 0x1d9, 0x1d9, 0x25e9, 0x0,
	  0x0, 0x1d9, 0x1d9, 0x1d9}
	(gdb) dump ihex memory flash.ihex 0 8192
	(gdb) mon erase_mass
	Erase successful!
	(gdb) p/x *(unsigned int *)0@32
	$9 = {0xffffffff <repeats 32 times>}
	(gdb) load flash.ihex
	Loading section .sec1, size 0x2000 lma 0x0
	Start address 0x00000000, load size 8192
	Transfer rate: 5 KB/sec, 910 bytes/write.
	(gdb) p/x *(unsigned int *)0@32
	$10 = {0x20000f88, 0x1db, 0x1d1, 0x1d9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x1d9, 0x0, 0x0, 0xf5, 0x1081, 0x1d9, 0x1d9, 0x1d9, 0x1d9, 0x1d9, 0x1d9, 0x1d9, 0x0, 0x1d9, 0x1d9, 0x25e9, 0x0,
	  0x0, 0x1d9, 0x1d9, 0x1d9}
	(gdb)

Signed-off-by: Sean Cross <sean@xobs.io>
2021-12-29 15:25:51 +01:00
Sean Cross d00607f71a samd: parameterize memory and flash sizes
Various SAMD devices have different amounts of memory. Up until now, all
SAMD devices have had the same amount, and therefore this value was
hardcoded to 32k of RAM and 256k of flash.

Add a parameter to the description field and set it to default to the
previous values. Use this description field when adding memories to the
target definition.

Signed-off-by: Sean Cross <sean@xobs.io>
2021-12-29 15:25:51 +01:00
Sean Cross 8039e2b26a crc32: define `start_time` when debug is enabled
The variable `start_time` indicates when a CRC32 operation began. This
variable is used to benchmark the speed of the CRC32 function.

Currently, this is tied to `PC_HOSTED`. However, the actual usage is
tied to `DEBUG_WARN`. This means that the variable is undefined when
`DEBUG_WARN` is defined and we're not configured for `PC_HOSTED` mode.

Add macro guards around this variable so that it is defined when
debugging is enabled, rather than only when building on `PC_HOSTED`.

Signed-off-by: Sean Cross <sean@xobs.io>
2021-12-28 00:25:31 -08:00
Mark Rages f43101fd9f Port gdb.py and hexprog.py to Python 3.
Unfortunately, the serial data are not 7-bit clean (see write_mem()).
So getpacket() and putpacket() use bytes objects rather than strings.
2021-12-19 14:45:51 -08:00
Piotr Esden-Tempski fcb2a609fc scripts: Updated nrf51 id script for py3 and to parse newer oocd header. 2021-12-19 14:45:51 -08:00
Piotr Esden-Tempski 728e955193 scripts: Updated bootprog to run on python3 2021-12-19 14:45:45 -08:00
Uwe Bonnes 3f28e728e9 cdcacm: Lower usage of magic numbers. 2021-12-18 21:44:18 -08:00
Uwe Bonnes 98e3858f7c bmp_libusb: Exclude Wireless class too. 2021-11-23 20:54:59 +01:00
Koen De Vleeschauwer bb4151377f type of ‘assert’ defaults to ‘int’ 2021-11-22 19:51:10 +01:00
Koen De Vleeschauwer d4cd81fa36 start_time undeclared if ENABLE_DEBUG=1 2021-11-21 12:57:30 +01:00
Uwe Bonnes 73b4612ec7 adiv5_swdp: Initialize a volatile variable
GCC did not warn about possibly missing initialization and so for gdb target
was not recognized.
2021-11-20 22:38:35 +01:00
Uwe Bonnes 5cb501049a adiv5_swdp/scan: Handle parity errors, seen with NRF52 with SYSTEMOFF #381/#949 2021-11-18 22:59:17 +01:00
UweBonnes efa889156f
Merge pull request #948 from fabalthazar/STM32G0-OTP
STM32G0 OTP area programming and hosted monitor command allowed as preliminary action
2021-11-16 14:23:20 +01:00
fabalthazar b4ac52d1f5 Hosted monitor command allowed as preliminary command 2021-11-15 21:20:38 +01:00
fabalthazar 71b67beb98 Fix: assert flashing succeeded or failed (hosted) once the last buffer has been written 2021-11-15 21:19:08 +01:00
fabalthazar 92d6056711 STM32G0 OTP area programming 2021-11-15 21:19:08 +01:00
Koen De Vleeschauwer 73624826b6 semihosting exit code 2021-11-14 12:03:33 +01:00
UweBonnes 59dc225568
Merge pull request #937 from UweBonnes/CMSIS-DAP
CMSIS-DAP/ADIv5 fixes for #936 and #925
2021-11-11 22:06:02 +01:00
Uwe Bonnes 1d0e45bdbb cmsis_dap: Transfersize of block commands needs to cope with word.
Checkme: Dragonprobe bulk hangs on transfers with 15 words.
2021-11-02 18:17:12 +01:00
Uwe Bonnes 8970160f1d cmsis_dap: Timeout and start of error handling for bulk transfers. 2021-11-02 18:17:12 +01:00
Uwe Bonnes 2bc2db1140 cmsis_da: Add timeout to bulk commands. 2021-11-02 18:17:12 +01:00
Uwe Bonnes a4caec29b9 dap_swdptap_seq_out: Write only needed data
Dragonprobe (origin/cmsisdap-fixes, 211031) hanged on additional byes in the
SWJ_Sequence request.
2021-11-02 18:17:03 +01:00
Uwe Bonnes 181466549b adiv5: Progressive incrementing TRNCNT for the DHCSR write when trying to halt
Workaround for CMSIS-DAP/Bulk debugger orbtrace  that returns NO_ACK
with high values of TRNCNT. Perhaps only STM32F767 needs write to DHCSR
with high occupancy to catch the device in a moment not sleeping.
2021-10-31 12:55:41 +01:00
Uwe Bonnes 07b4e5726e CMSIS-DAP: Run time detect DAP_SWD_SEQUENCE
Some dongles in the making like orbtrace may not yet support.
2021-10-31 12:55:41 +01:00
Uwe Bonnes 88e44d1c12 cmsis: use exception in wait_word(). 2021-10-31 12:55:41 +01:00
Uwe Bonnes a1d4649795 SWD: Use dp_low_write to allow multidrop scan. 2021-10-31 12:55:41 +01:00
Uwe Bonnes 4f36c1ddf8 Remove dp_low_read() and use exception protected dp_read() 2021-10-31 12:55:41 +01:00
Uwe Bonnes f9d343af3e cmsis: AP reads are posted. Read from RDBUFF. 2021-10-31 12:55:41 +01:00
Uwe Bonnes d4ae308f9f cmsis: implement srst_set_val() 2021-10-31 12:55:41 +01:00
Uwe Bonnes 166eb3ee3e cmsis_dap: Always transfer 65 bytes with hid_read|write()
CMSIS-DAP Dragonprobe works on some devices. E.g. it does not work
on NUCLEO-F103
2021-10-31 12:55:41 +01:00
Uwe Bonnes b343ebe06f cmsis-dap/linux: Link against libhidapi-hidraw
libhidapi-libusb detaches a kernel module but does not reattach again.
This may wrack interaction with other programs using hidapi.
2021-10-31 12:55:41 +01:00
Uwe Bonnes d144f9d54b adiv5: CMSIS DAP transactions are slow but work in principle
Slowness results in strange STM32F767 DHCSR implementation to nearly never
halt in the given 2 second period when F767 is sleeping most of the time.
2021-10-31 12:55:41 +01:00
Uwe Bonnes 761e0230d4 cmsis-dap: Print messages when transfers fail.
Expect signal integrity errors when using jumper cables. Often probes switch
the SWJ GPIO with highest speed, resulting in possible reflections. Additional
ground wires may help. If there is isolation between probe and targets,
additional ground wires are a must or ground shift will wrack the transfer!
2021-10-31 12:55:41 +01:00
Uwe Bonnes 39fbffd3d2 stlinkv2: Fix low access to AP registers. 2021-10-31 12:55:41 +01:00
Uwe Bonnes c13778139f adiv5/hosted: Export the BMP_TYPE in DP. 2021-10-31 12:55:41 +01:00
Uwe Bonnes b7e7aa3f9a adiv5: Either use only LL functions in cortexm_initial_halt or no LL at all.
Platform implementation may disturb ADIV5_AP_DRW and so low_read DHCSR may
give values other from registers
2021-10-31 12:55:41 +01:00
Uwe Bonnes 485105221e dap: Always work on a copy of the buffer when calling dbg_dap_cmd() in a loop
A better solution would use seperate buffers for dbg_dap_cmd. But as WAIT is
already handled in DAP, cahnces are low that loop re-entry is needed.
2021-10-31 12:55:41 +01:00
Uwe Bonnes 397fbd5749 cmsis: Only cmsis internal use must differentiate between HID and Bulk access
Missing DAP_SWD_SEQUENCE may eventually need a distinction visible from
outside later.
2021-10-31 12:55:41 +01:00
Uwe Bonnes 7b1eb6e6e3 bmp_libusb: reset type on every device. 2021-10-31 12:53:47 +01:00
Uwe Bonnes 80064c18a9 bmp_libusb: Fix CMSIS-DAP related memory leak. 2021-10-31 11:13:34 +01:00
Uwe Bonnes 8845a22226 stm32l4: Use targetid when available.
Fixes STM32U5 from crashing.
2021-10-31 11:13:34 +01:00
Uwe Bonnes c4b6b42dcf stlinkv2: Read targetid on DPv2 devices. 2021-10-31 11:13:34 +01:00
Uwe Bonnes 5dafc0828c SWD: Remove excessive line resets. 2021-10-31 11:12:46 +01:00
Uwe Bonnes e7e1bfdb53 mpsse: Fix using 60 MHz clock on fast devices. 2021-10-30 13:55:57 +02:00
Uwe Bonnes 99a5fdb6f8 bmp_remote: Better error propagation.
Negative values from platform_buffer_read are errors too!
2021-10-30 13:55:57 +02:00
Uwe Bonnes f4117aa1b4 cdcacm: Use the USB strings. 2021-10-30 13:55:57 +02:00
Uwe Bonnes f28f05952f stlink: Add another STLINK-V3 ID. 2021-10-30 13:55:57 +02:00
SG 7307f086c6
Support for STM32WB55 (#942)
* add STM32WB55 support
2021-10-30 13:01:06 +02:00
Uwe Bonnes e1a928beb1 Fixes to compile with gcc11 #925
Target code changes are pure for formal correctness and not tested!
2021-10-10 15:59:57 +02:00