v3hil: add debug logging
This commit is contained in:
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9484b1cff6
commit
c375f74c51
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@ -225,6 +225,6 @@ int hal_proto_execute(struct hal_proto *p, uint8_t fid,
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return 0;
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fail:
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printc_err("hal_proto_execute: fid: 0x%02x\n", fid);
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printc_err("hal_proto_execute: fid: 0x%02x: failed\n", fid);
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return -1;
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}
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@ -84,94 +84,94 @@ typedef enum {
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HAL_PROTO_ERR_EXECUTE_FUNCLET_NO_LOCKA = 0xFFF8,
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HAL_PROTO_ERR_EXECUTE_FUNCLET_EXECUTION_TIMEOUT = 0xFFF7,
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HAL_PROTO_ERR_EXECUTE_FUNCLET_EXECUTION_ERROR = 0xFFF6,
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+
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HAL_PROTO_ERR_WRITE_MEM_WORD_NO_RAM_ADDRESS = 0xFFF5,
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HAL_PROTO_ERR_WRITE_MEM_WORD_NO_RAM_SIZE = 0xFFF4,
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HAL_PROTO_ERR_WRITE_MEM_WORD_UNKNOWN = 0xFFF3,
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+
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HAL_PROTO_ERR_WRITE_MEM_BYTES_NO_RAM_ADDRESS = 0xFFF2,
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HAL_PROTO_ERR_WRITE_MEM_BYTES_NO_RAM_SIZE = 0xFFF1,
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HAL_PROTO_ERR_WRITE_MEM_BYTES_UNKNOWN = 0xFFF0,
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+
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HAL_PROTO_ERR_WRITE_FLASH_WORD_NO_FLASH_ADDRESS = 0xFFEF,
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HAL_PROTO_ERR_WRITE_FLASH_WORD_NO_FLASH_SIZE = 0xFFEE,
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HAL_PROTO_ERR_WRITE_FLASH_WORD_UNKNOWN = 0xFFED,
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+
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HAL_PROTO_ERR_WRITE_FLASH_QUICK_UNKNOWN = 0xFFEC,
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+
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HAL_PROTO_ERR_START_JTAG_NO_PROTOCOL = 0xFFEB,
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HAL_PROTO_ERR_START_JTAG_PROTOCOL_UNKNOWN = 0xFFEA,
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+
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HAL_PROTO_ERR_SET_CHAIN_CONFIGURATION_STREAM = 0xFFE9,
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+
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HAL_PROTO_ERR_RESTORECONTEXT_RELEASE_JTAG_NO_WDT_ADDRESS = 0xFFE8,
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HAL_PROTO_ERR_RESTORECONTEXT_RELEASE_JTAG_NO_WDT_VALUE = 0xFFE7,
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HAL_PROTO_ERR_RESTORECONTEXT_RELEASE_JTAG_NO_PC = 0xFFE6,
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HAL_PROTO_ERR_RESTORECONTEXT_RELEASE_JTAG_NO_SR = 0xFFE5,
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HAL_PROTO_ERR_RESTORECONTEXT_RELEASE_JTAG_NO_CONTROL_MASK = 0xFFE4,
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HAL_PROTO_ERR_RESTORECONTEXT_RELEASE_JTAG_NO_MDB = 0xFFE3,
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+
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HAL_PROTO_ERR_READ_MEM_WORD_NO_ADDRESS = 0xFFF2,
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HAL_PROTO_ERR_READ_MEM_WORD_NO_SIZE = 0xFFF1,
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+
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HAL_PROTO_ERR_READ_MEM_UNKNOWN = 0xFFE0,
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+
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HAL_PROTO_ERR_READ_MEM_BYTES_NO_ADDRESS = 0xFFDF,
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HAL_PROTO_ERR_READ_MEM_BYTES_NO_SIZE = 0xFFDE,
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+
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HAL_PROTO_ERR_PSA_NO_ADDRESS = 0xFFDD,
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HAL_PROTO_ERR_PSA_NO_SIZE = 0xFFDC,
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+
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HAL_PROTO_ERR_SYNC_JTAG_ASSERT_POR_JTAG_TIMEOUT = 0xFFDB,
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HAL_PROTO_ERR_SYNC_JTAG_ASSERT_POR_NO_WDT_ADDRESS = 0xFFDA,
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HAL_PROTO_ERR_SYNC_JTAG_ASSERT_POR_NO_WDT_VALUE = 0xFFD9,
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+
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HAL_PROTO_ERR_WRITE_ALL_CPU_REGISTERS_STREAM = 0xFFD8,
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+
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HAL_PROTO_ERR_WRITE_MEM_WORD_XV2_NO_RAM_ADDRESS = 0xFFD7,
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HAL_PROTO_ERR_WRITE_MEM_WORD_XV2_NO_RAM_SIZE = 0xFFD6,
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+
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HAL_PROTO_ERR_SECURE_NO_TGT_HAS_TEST_PIN = 0xFFD5,
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+
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HAL_PROTO_ERR_SYNC_JTAG_CONDITIONAL_JTAG_TIMEOUT = 0xFFD4,
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HAL_PROTO_ERR_SYNC_JTAG_CONDITIONAL_NO_WDT_ADDRESS = 0xFFD3,
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HAL_PROTO_ERR_SYNC_JTAG_CONDITIONAL_NO_WDT_VALUE = 0xFFD2,
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+
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HAL_PROTO_ERR_INSTRUCTION_BOUNDARY_ERROR = 0xFFD1,
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HAL_PROTO_ERR_JTAG_VERSION_MISMATCH = 0xFFD0,
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+
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HAL_PROTO_ERR_JTAG_MAILBOX_IN_TIMOUT = 0xFFCF,
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HAL_PROTO_ERR_JTAG_PASSWORD_WRONG = 0xFFCE,
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+
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HAL_PROTO_ERR_START_JTAG_NO_ACTIVATION_CODE = 0xFFCD,
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HAL_PROTO_ERR_SINGLESTEP_WAITFOREEM_TIMEOUT = 0xFFCC,
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+
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HAL_PROTO_ERR_CONFIG_NO_PARAMETER = 0xFFCB,
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HAL_PROTO_ERR_CONFIG_NO_VALUE = 0xFFCA,
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HAL_PROTO_ERR_CONFIG_PARAM_UNKNOWN_PARAMETER = 0xFFC9,
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+
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HAL_PROTO_ERR_NO_NUM_BITS = 0xFFC8,
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HAL_PROTO_ERR_ARRAY_SIZE_MISMATCH = 0xFFC7,
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+
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HAL_PROTO_ERR_NO_COMMAND = 0xFFC6,
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HAL_PROTO_ERR_UNKNOWN_COMMAND = 0xFFC5,
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HAL_PROTO_ERR_NO_DATA = 0xFFC4,
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HAL_PROTO_ERR_NO_BIT_SIZE = 0xFFC3,
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HAL_PROTO_ERR_INVALID_BIT_SIZE = 0xFFC2,
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+
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HAL_PROTO_ERR_UNLOCK_NO_PASSWORD_LENGTH = 0xFFC1,
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HAL_PROTO_ERR_UNLOCK_INVALID_PASSWORD_LENGTH = 0xFFC0,
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+
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HAL_PROTO_ERR_EXECUTE_FUNCLET_FINISH_TIMEOUT = 0xFFBF,
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+
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HAL_PROTO_ERR_EXECUTE_FUNCLET_NO_MAXRSEL = 0xFFBE,
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+
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HAL_PROTO_ERR_API_CALL_NOT_SUPPORTED = 0xFFBD,
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+
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HAL_PROTO_ERR_MAGIC_PATTERN = 0xFFBC,
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HAL_PROTO_ERR_MAGIC_PATTERN_BOOT_DATA_CRC_WRONG = 0xFFBB,
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HAL_PROTO_ERR_DAP_NACK = 0xFFBA,
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+
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HAL_PROTO_MESSAGE_NO_RESPONSE = 0x8000,
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HAL_PROTO_EXCEPTION_NOT_IMPLEMENT_ERR = 0x8001,
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HAL_PROTO_EXCEPTION_MSGID_ERR = 0x8002,
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@ -16,6 +16,7 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stdbool.h>
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#include <string.h>
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#include "bytes.h"
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#include "v3hil.h"
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@ -23,6 +24,12 @@
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#include "output.h"
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#include "opdb.h"
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#ifdef DEBUG_V3HIL
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#define dbg_printc(fmt, ...) printc_dbg("v3hil: " fmt, ##__VA_ARGS__)
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#else
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#define dbg_printc(fmt, ...) do{}while(0)
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#endif
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/* HAL function IDs */
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typedef enum {
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HAL_PROTO_FID_INIT = 0x01,
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@ -167,7 +174,8 @@ static hal_proto_fid_t map_fid(const struct v3hil *h, hal_proto_fid_t src)
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{
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hal_proto_fid_t dst = h->chip->v3_functions[src];
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return dst ? dst : src;
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dbg_printc("map fid: %02x -> %02x\n", src, dst);
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return dst;
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}
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void v3hil_init(struct v3hil *h, transport_t trans,
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@ -182,6 +190,7 @@ int v3hil_set_vcc(struct v3hil *h, int vcc_mv)
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uint8_t data[2];
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w16le(data, vcc_mv);
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dbg_printc("Setting VCC...\n");
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return hal_proto_execute(&h->hal, HAL_PROTO_FID_SET_VCC, data, 2);
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}
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@ -221,6 +230,7 @@ int v3hil_start_jtag(struct v3hil *h, v3hil_jtag_type_t type)
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uint8_t data = type;
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uint8_t chain_id[2] = {0, 0};
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dbg_printc("Start JTAG...\n");
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if (hal_proto_execute(&h->hal, HAL_PROTO_FID_START_JTAG,
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&data, 1) < 0)
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return -1;
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@ -242,6 +252,7 @@ int v3hil_start_jtag(struct v3hil *h, v3hil_jtag_type_t type)
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int v3hil_stop_jtag(struct v3hil *h)
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{
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dbg_printc("Stop JTAG...\n");
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return hal_proto_execute(&h->hal, HAL_PROTO_FID_STOP_JTAG, NULL, 0);
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}
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@ -272,6 +283,7 @@ int v3hil_sync(struct v3hil *h)
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/* We can't use map_fid() because h->chip might be NULL -- this
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* function will be called before identification is complete.
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*/
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dbg_printc("Sync: assert POR\n");
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if (hal_proto_execute(&h->hal,
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(h->jtag_id == 0x89)
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? HAL_PROTO_FID_SJ_ASSERT_POR_SC
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@ -308,6 +320,7 @@ int v3hil_read(struct v3hil *h, address_t addr,
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w32le(req + 4, (m->bits == 8) ? size : (size >> 1));
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w32le(req + 8, h->regs[MSP430_REG_PC]);
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dbg_printc("do read\n");
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if (hal_proto_execute(&h->hal,
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map_fid(h, (m->bits == 8) ? HAL_PROTO_FID_READ_MEM_BYTES :
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HAL_PROTO_FID_READ_MEM_WORDS),
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@ -366,6 +379,7 @@ static int calibrate_dco(struct v3hil *h, uint8_t max_bcs)
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w16le(data, ram->offset);
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w16le(data + 2, max_bcs);
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dbg_printc("calibrate dco: get freq\n");
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if (hal_proto_execute(&h->hal,
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map_fid(h, HAL_PROTO_FID_GET_DCO_FREQUENCY),
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data, 6) < 0)
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@ -384,6 +398,7 @@ static int calibrate_dco(struct v3hil *h, uint8_t max_bcs)
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mem_write[9] = data[2]; /* BCS1 */
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mem_write[10] = data[4]; /* BCS2 */
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mem_write[11] = 0; /* pad */
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dbg_printc("calibrate dco: write\n");
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if (hal_proto_execute(&h->hal,
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map_fid(h, HAL_PROTO_FID_WRITE_MEM_BYTES),
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mem_write, 12) < 0) {
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@ -412,6 +427,7 @@ static int calibrate_fll(struct v3hil *h)
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w16le(data, ram->offset);
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w16le(data + 2, 0);
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dbg_printc("calibrate fll: get dco freq\n");
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if (hal_proto_execute(&h->hal,
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map_fid(h, HAL_PROTO_FID_GET_DCO_FREQUENCY),
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data, 10) < 0)
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@ -433,6 +449,7 @@ static int calibrate_fll(struct v3hil *h)
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mem_write[12] = data[8]; /* FLLCTL1 */
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mem_write[13] = 0; /* pad */
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dbg_printc("calibrate fll: write\n");
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if (hal_proto_execute(&h->hal,
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map_fid(h, HAL_PROTO_FID_WRITE_MEM_BYTES),
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mem_write, 14) < 0) {
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@ -504,6 +521,7 @@ static int upload_funclet(struct v3hil *h,
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for (i = 0; i < n; i++)
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w16le(data + 8 + i * 2, code[i]);
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dbg_printc("upload funclet: %d\n", n);
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if (hal_proto_execute(&h->hal,
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map_fid(h, HAL_PROTO_FID_WRITE_MEM_WORDS),
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data, n * 2 + 8) < 0) {
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@ -537,8 +555,10 @@ static int write_flash(struct v3hil *h, address_t addr,
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return -1;
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}
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dbg_printc("write flash: calibrate\n");
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if (calibrate(h) < 0)
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return -1;
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dbg_printc("write flash: upload funclet\n");
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if (upload_funclet(h, ram, f) < 0)
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return -1;
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@ -563,6 +583,7 @@ static int write_flash(struct v3hil *h, address_t addr,
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w16le(data + 20, h->cal.cal1);
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memcpy(data + 22, mem, size);
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dbg_printc("exec write flash funclet\n");
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if (hal_proto_execute(&h->hal,
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map_fid(h, HAL_PROTO_FID_EXECUTE_FUNCLET),
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data, size + 22) < 0) {
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@ -584,6 +605,7 @@ static int write_ram(struct v3hil *h, const struct chipinfo_memory *m,
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memcpy(data + 8, mem, size);
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dbg_printc("write ram\n");
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if (hal_proto_execute(&h->hal,
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map_fid(h, (m->bits == 8) ? HAL_PROTO_FID_WRITE_MEM_BYTES
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: HAL_PROTO_FID_WRITE_MEM_WORDS),
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@ -610,9 +632,11 @@ int v3hil_write(struct v3hil *h, address_t addr,
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if (size > 128)
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size = 128;
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dbg_printc("write: call write flash\n");
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if (m->type == CHIPINFO_MEMTYPE_FLASH)
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return write_flash(h, addr, mem, size);
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dbg_printc("call write ram\n");
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return write_ram(h, m, addr, mem, size);
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}
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@ -637,6 +661,7 @@ static int call_erase(struct v3hil *h,
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w16le(data + 20, h->cal.cal1);
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w32le(data + 22, 0xdeadbeef);
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dbg_printc("erase: call funclet\n");
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if (hal_proto_execute(&h->hal,
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map_fid(h, HAL_PROTO_FID_EXECUTE_FUNCLET),
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data, 26) < 0) {
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@ -670,8 +695,10 @@ int v3hil_erase(struct v3hil *h, address_t segment)
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if (!flash)
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printc_err("v3hil: can't find appropriate flash region\n");
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dbg_printc("erase: calibrate\n");
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if (calibrate(h) < 0)
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return -1;
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dbg_printc("erase: upload funclet\n");
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if (upload_funclet(h, ram, f) < 0)
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return -1;
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@ -682,10 +709,13 @@ int v3hil_erase(struct v3hil *h, address_t segment)
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if (flash->banks)
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bank_size /= flash->banks;
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for (i = flash->banks; i >= 0; i--)
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for (i = flash->banks; i >= 0; i--) {
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dbg_printc("Erase bank %d\n", i);
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if (call_erase(h, ram, f,
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flash->offset + i * bank_size - 2, 0xa502) < 0)
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return -1;
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}
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} else {
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segment &= ~(flash->seg_size - 1);
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segment |= flash->seg_size - 2;
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@ -705,6 +735,7 @@ int v3hil_update_regs(struct v3hil *h)
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int i;
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int sptr = 0;
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dbg_printc("Read regs\n");
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if (hal_proto_execute(&h->hal, fid, NULL, 0) < 0) {
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printc_err("v3hil: can't read CPU registers\n");
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return -1;
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@ -758,6 +789,7 @@ int v3hil_flush_regs(struct v3hil *h)
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}
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}
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dbg_printc("Write regs\n");
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if (hal_proto_execute(&h->hal, fid, data, reg_size * 13) < 0) {
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printc_err("v3hil: can't write CPU registers\n");
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return -1;
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@ -781,6 +813,7 @@ int v3hil_context_restore(struct v3hil *h, int free)
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data[10] = free ? 7 : 6;
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data[14] = free ? 1 : 0;
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dbg_printc("Context restore\n");
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if (hal_proto_execute(&h->hal,
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map_fid(h, HAL_PROTO_FID_RC_RELEASE_JTAG),
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data, 18) < 0) {
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@ -803,6 +836,7 @@ int v3hil_context_save(struct v3hil *h)
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data[2] = h->wdtctl | 0x80;
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data[3] = 0x5a; /* WDTPW */
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dbg_printc("Context save\n");
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if (hal_proto_execute(&h->hal,
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map_fid(h, HAL_PROTO_FID_SJ_CONDITIONAL_SC),
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data, 8) < 0)
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@ -834,6 +868,7 @@ int v3hil_single_step(struct v3hil *h)
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data[9] = h->regs[MSP430_REG_SR] >> 8;
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data[10] = 7;
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dbg_printc("Single-stepping...\n");
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if (hal_proto_execute(&h->hal,
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map_fid(h, HAL_PROTO_FID_SINGLE_STEP),
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data, 18) < 0) {
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@ -868,6 +903,8 @@ static int set_param(struct v3hil *fet, hal_proto_config_t cfg,
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}
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data[0] = cfg;
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dbg_printc("Set param 0x%02x to 0x%08x\n", cfg, value);
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if (hal_proto_execute(&fet->hal, HAL_PROTO_FID_CONFIGURE,
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data, 8) < 0) {
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printc_err("v3hil: can't set param 0x%02x to 0x%08x\n",
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