Merge pull request #69 from tgtakaoka/simio-timer-b
[simio] support Timer_B
This commit is contained in:
Daniel Beer
GitHub
commit
f017df6781
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@ -16,6 +16,7 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stdbool.h>
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#include <stdlib.h>
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#include <string.h>
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@ -35,13 +36,18 @@
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#define TACLR 0x0004 /* Timer A counter clear */
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#define TAIE 0x0002 /* Timer A counter interrupt enable */
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#define TAIFG 0x0001 /* Timer A counter interrupt flag */
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/* TBCTL bits */
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#define TBCLGRP1 0x4000 /* Timer B Compare latch load group 1 */
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#define TBCLGRP0 0x2000 /* Timer B Compare latch load group 0 */
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#define CNTL1 0x1000 /* Timer B Counter length 1 */
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#define CNTL0 0x0800 /* Timer B Counter length 0 */
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/* TACCTLx flags (taken from mspgcc) */
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#define CM1 0x8000 /* Capture mode 1 */
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#define CM0 0x4000 /* Capture mode 0 */
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#define CCIS1 0x2000 /* Capture input select 1 */
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#define CCIS0 0x1000 /* Capture input select 0 */
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#define SCS 0x0800 /* Capture sychronize */
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#define SCS 0x0800 /* Capture synchronize */
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#define SCCI 0x0400 /* Latched capture signal (read) */
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#define CAP 0x0100 /* Capture mode: 1 /Compare mode : 0 */
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#define OUTMOD2 0x0080 /* Output mode 2 */
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@ -52,26 +58,42 @@
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/* #define OUT 0x0004 PWM Output signal if output mode 0 */
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#define COV 0x0002 /* Capture/compare overflow flag */
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#define CCIFG 0x0001 /* Capture/compare interrupt flag */
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/* TBCCTLx flags */
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#define CLLD1 0x0400 /* Compare latch load source 1 */
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#define CLLD0 0x0200 /* Compare latch load source 0 */
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/* Timer IV words */
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#define TAIV_TAIFG 0x000A /* Interrupt vector word for TAIFG */
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#define TBIV_TBIFG 0x000E /* Interrupt vector word for TBIFG */
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#define MAX_CCRS 7
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typedef enum {
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TIMER_TYPE_A,
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TIMER_TYPE_B,
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} timer_type_t;
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struct timer {
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struct simio_device base;
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int size;
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int clock_input;
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int go_down;
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bool go_down;
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address_t base_addr;
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address_t iv_addr;
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int irq0;
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int irq1;
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timer_type_t timer_type;
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/* IO registers */
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uint16_t tactl;
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uint16_t tar;
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uint16_t ctls[MAX_CCRS];
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uint16_t ccrs[MAX_CCRS];
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/* Compare latch for Timer_B */
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uint16_t bcls[MAX_CCRS];
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/* True if ccrs[index] has a value set. Used for compare latch grouping */
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bool valid_ccrs[MAX_CCRS];
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};
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static struct simio_device *timer_create(char **arg_text)
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@ -109,6 +131,7 @@ static struct simio_device *timer_create(char **arg_text)
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tr->iv_addr = 0x12e;
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tr->irq0 = 9;
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tr->irq1 = 8;
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tr->timer_type = TIMER_TYPE_A;
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return (struct simio_device *)tr;
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}
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@ -126,9 +149,11 @@ static void timer_reset(struct simio_device *dev)
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tr->tactl = 0;
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tr->tar = 0;
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tr->go_down = 0;
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tr->go_down = false;
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memset(tr->ccrs, 0, sizeof(tr->ccrs));
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memset(tr->ctls, 0, sizeof(tr->ctls));
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memset(tr->bcls, 0, sizeof(tr->bcls));
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memset(tr->valid_ccrs, false, sizeof(tr->valid_ccrs));
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}
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static int config_addr(address_t *addr, char **arg_text)
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@ -148,6 +173,28 @@ static int config_addr(address_t *addr, char **arg_text)
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return 0;
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}
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static int config_type(timer_type_t *timer_type, char **arg_text)
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{
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char *text = get_arg(arg_text);
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if (!text) {
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printc_err("timer: config: expected type\n");
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return -1;
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}
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if (!strcasecmp(text, "A")) {
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*timer_type = TIMER_TYPE_A;
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return 0;
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}
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if (!strcasecmp(text, "B")) {
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*timer_type = TIMER_TYPE_B;
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return 0;
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}
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printc_err("timer: can't parse type: %s\n", text);
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return -1;
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}
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static int config_irq(int *irq, char **arg_text)
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{
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char *text = get_arg(arg_text);
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@ -167,14 +214,40 @@ static int config_irq(int *irq, char **arg_text)
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return 0;
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}
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static void trigger_capture(struct timer *tr, int which, int oldval, int value)
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{
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uint16_t edge_flags = 0;
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tr->ctls[which] &= ~CCI;
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if (value)
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tr->ctls[which] |= CCI;
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if (oldval && !value)
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edge_flags |= CM1;
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if (!oldval && value)
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edge_flags |= CM0;
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printc_dbg("Timer channel %d: %s => %s\n",
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which, oldval ? "H" : "L", value ? "H" : "L");
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if ((tr->ctls[which] & edge_flags) && (tr->ctls[which] & CAP)) {
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if (tr->ctls[which] & CCIFG) {
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printc_dbg("Timer capture overflow\n");
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tr->ctls[which] |= COV;
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} else {
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printc_dbg("Timer capture interrupt triggered\n");
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tr->ccrs[which] = tr->tar;
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tr->ctls[which] |= CCIFG;
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}
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}
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}
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static int config_channel(struct timer *tr, char **arg_text)
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{
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char *which_text = get_arg(arg_text);
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char *value_text = get_arg(arg_text);
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address_t which;
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address_t value;
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int oldval;
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uint16_t edge_flags = 0;
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if (!(which_text && value_text)) {
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printc_err("timer: config: expected channel and value\n");
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@ -198,29 +271,7 @@ static int config_channel(struct timer *tr, char **arg_text)
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return -1;
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}
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oldval = tr->ctls[which] & CCI;
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tr->ctls[which] &= ~CCI;
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if (value)
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tr->ctls[which] |= CCI;
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if (oldval && !value)
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edge_flags |= CM1;
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if (!oldval && value)
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edge_flags |= CM0;
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printc_dbg("Timer channel %d: %s => %s\n",
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which, oldval ? "H" : "L", value ? "H" : "L");
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if ((tr->ctls[which] & edge_flags) && (tr->ctls[which] & CAP)) {
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if (tr->ctls[which] & CCIFG) {
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printc_dbg("Timer capture overflow\n");
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tr->ctls[which] |= COV;
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} else {
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printc_dbg("Timer capture interrupt triggered\n");
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tr->ccrs[which] = tr->tar;
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tr->ctls[which] |= CCIFG;
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}
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}
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trigger_capture(tr, which, tr->ctls[which] & CCI, value);
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return 0;
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}
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@ -232,6 +283,8 @@ static int timer_config(struct simio_device *dev,
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if (!strcasecmp(param, "base"))
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return config_addr(&tr->base_addr, arg_text);
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if (!strcasecmp(param, "type"))
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return config_type(&tr->timer_type, arg_text);
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if (!strcasecmp(param, "iv"))
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return config_addr(&tr->iv_addr, arg_text);
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if (!strcasecmp(param, "irq0"))
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@ -261,7 +314,8 @@ static uint16_t calc_iv(struct timer *tr, int update)
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if ((tr->tactl & (TAIFG | TAIE)) == (TAIFG | TAIE)) {
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if (update)
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tr->tactl &= ~TAIFG;
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return 0xa;
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return (tr->timer_type == TIMER_TYPE_A) ?
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TAIV_TAIFG : TBIV_TBIFG;
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}
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return 0;
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@ -271,26 +325,91 @@ static int timer_info(struct simio_device *dev)
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{
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struct timer *tr = (struct timer *)dev;
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int i;
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char timer_type = (tr->timer_type == TIMER_TYPE_A) ? 'A' : 'B';
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printc("Base address: 0x%04x\n", tr->base_addr);
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printc("IV address: 0x%04x\n", tr->iv_addr);
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printc("IRQ0: %d\n", tr->irq0);
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printc("IRQ1: %d\n", tr->irq1);
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printc("IRQ0: %d\n", tr->irq0);
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printc("IRQ1: %d\n", tr->irq1);
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printc("\n");
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printc("TACTL: 0x%04x\n", tr->tactl);
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printc("TAR: 0x%04x\n", tr->tar);
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printc("TAIV: 0x%02x\n", calc_iv(tr, 0));
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printc("T%cCTL: 0x%04x\n", timer_type, tr->tactl);
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printc("T%cR: 0x%04x\n", timer_type, tr->tar);
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printc("T%cIV: 0x%02x\n", timer_type, calc_iv(tr, 0));
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printc("\n");
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for (i = 0; i < tr->size; i++)
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printc("Channel %2d, TACCTL = 0x%04x, TACCR = 0x%04x\n",
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i, tr->ctls[i], tr->ccrs[i]);
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for (i = 0; i < tr->size; i++) {
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printc("T%cCCTL%d = 0x%04x, T%cCCR%d = 0x%04x",
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timer_type, i, tr->ctls[i], timer_type, i, tr->ccrs[i]);
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if (tr->timer_type == TIMER_TYPE_B)
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printc(", TBCL%d = 0x%04x", i, tr->bcls[i]);
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printc("\n");
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}
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return 0;
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}
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static uint16_t tar_mask(struct timer *tr)
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{
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if (tr->timer_type == TIMER_TYPE_B) {
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switch (tr->tactl & (CNTL1 | CNTL0)) {
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case 0: /* 16 bits */
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break;
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case CNTL0: /* 12 bits */
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return 0x0fff;
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case CNTL1: /* 10 bits */
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return 0x03ff;
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case CNTL1 | CNTL0: /* 8 bits */
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return 0x00ff;
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}
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}
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return 0xffff;
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}
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static void set_bcl(struct timer *tr, int index)
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{
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tr->bcls[index] = tr->ccrs[index];
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tr->valid_ccrs[index] = false;
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}
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static bool no_double_buffer(struct timer *tr, int index)
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{
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uint16_t clgrp = tr->tactl & (TBCLGRP1 | TBCLGRP0);
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if (clgrp == TBCLGRP0 && (index == 2 || index == 4 || index == 6))
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return (tr->ctls[index - 1] & (CLLD1 | CLLD0)) == 0;
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if (clgrp == TBCLGRP1 && (index == 2 || index == 5))
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return (tr->ctls[index - 1] & (CLLD1 | CLLD0)) == 0;
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if (clgrp == TBCLGRP1 && (index == 3 || index == 6))
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return (tr->ctls[index - 2] & (CLLD1 | CLLD0)) == 0;
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if (clgrp == (TBCLGRP1 | TBCLGRP0))
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return (tr->ctls[1] & (CLLD1 | CLLD0)) == 0;
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return (tr->ctls[index] & (CLLD1 | CLLD0)) == 0;
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}
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static void set_ccr(struct timer *tr, int index, uint16_t data)
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{
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tr->ccrs[index] = data;
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tr->valid_ccrs[index] = true;
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if (tr->timer_type == TIMER_TYPE_A) {
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/* When CCR[0] set is less than TAR in up mode, TAR rolls to
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* 0. */
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if (index == 0 && data < tr->tar &&
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(tr->tactl & (MC1 | MC0)) == MC0) {
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tr->go_down = true;
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}
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}
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if (tr->timer_type == TIMER_TYPE_B) {
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/* Writing TBCCRx triggers update TBCLx immediately. No
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* grouping. */
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if (no_double_buffer(tr, index)) {
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set_bcl(tr, index);
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}
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}
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}
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static int timer_write(struct simio_device *dev,
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address_t addr, uint16_t data)
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address_t addr, uint16_t data)
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{
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struct timer *tr = (struct timer *)dev;
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@ -303,16 +422,24 @@ static int timer_write(struct simio_device *dev,
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}
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if (addr == tr->base_addr + 0x10) {
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tr->tar = data;
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tr->tar = data & tar_mask(tr);
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return 0;
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}
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if (addr >= tr->base_addr + 2 &&
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addr < tr->base_addr + (tr->size << 1) + 2) {
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int index = ((addr & 0xf) - 2) >> 1;
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uint16_t oldval = tr->ctls[index];
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uint16_t mask;
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tr->ctls[index] = (data & 0xf9f7) |
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(tr->ctls[index] & 0x0608);
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if (tr->timer_type == TIMER_TYPE_A)
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mask = 0x0608;
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if (tr->timer_type == TIMER_TYPE_B)
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mask = 0x0008;
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tr->ctls[index] = (data & ~mask) | (oldval & mask);
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/* Check capture initiated by Software */
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if ((data & (CAP | CCIS1)) == (CAP | CCIS1))
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trigger_capture(tr, index, oldval & CCI, data & CCIS0);
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return 0;
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}
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@ -320,7 +447,7 @@ static int timer_write(struct simio_device *dev,
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addr < tr->base_addr + (tr->size << 1) + 0x12) {
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int index = ((addr & 0xf) - 2) >> 1;
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tr->ccrs[index] = data;
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set_ccr(tr, index, data);
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return 0;
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}
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@ -334,7 +461,7 @@ static int timer_write(struct simio_device *dev,
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}
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static int timer_read(struct simio_device *dev,
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address_t addr, uint16_t *data)
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address_t addr, uint16_t *data)
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{
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struct timer *tr = (struct timer *)dev;
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@ -395,42 +522,134 @@ static void timer_ack_interrupt(struct simio_device *dev, int irq)
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/* By design irq1 does not clear CCIFG or TAIFG automatically */
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}
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static uint16_t get_ccr(struct timer *tr, int index) {
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if (tr->timer_type == TIMER_TYPE_B)
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return tr->bcls[index];
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return tr->ccrs[index];
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}
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static uint16_t tar_increment(struct timer *tr)
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{
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tr->tar++;
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tr->tar &= tar_mask(tr);
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return tr->tar;
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}
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static uint16_t tar_decrement(struct timer *tr)
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{
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tr->tar--;
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tr->tar &= tar_mask(tr);
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return tr->tar;
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}
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static void tar_step(struct timer *tr)
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{
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switch ((tr->tactl >> 4) & 3) {
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case 0: break;
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case 0:
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break;
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case 1:
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if (tr->tar == tr->ccrs[0]) {
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if (tr->tar == get_ccr(tr, 0) || tr->go_down) {
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tr->tar = 0;
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tr->tactl |= TAIFG;
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tr->go_down = false;
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} else {
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tr->tar++;
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tar_increment(tr);
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}
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break;
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case 2:
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tr->tar++;
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if (!tr->tar)
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if (tar_increment(tr) == 0)
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tr->tactl |= TAIFG;
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break;
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case 3:
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if (tr->tar >= tr->ccrs[0])
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tr->go_down = 1;
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if (!tr->tar)
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tr->go_down = 0;
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if (tr->tar >= get_ccr(tr, 0))
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tr->go_down = true;
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if (tr->tar == 0)
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tr->go_down = false;
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if (tr->go_down) {
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tr->tar--;
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if (!tr->tar)
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if (tar_decrement(tr) == 0)
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tr->tactl |= TAIFG;
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} else {
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tr->tar++;
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tar_increment(tr);
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}
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break;
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}
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}
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static void update_bcls(struct timer *tr, int start, int n)
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{
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int index;
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const int end = start + n;
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for (index = start; index < end; index++) {
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if (!tr->valid_ccrs[index])
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return;
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}
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for (index = start; index < end; index++)
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set_bcl(tr, index);
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}
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static void update_bcl_group(struct timer *tr, int index)
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{
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switch (tr->tactl & (TBCLGRP1 | TBCLGRP0)) {
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||||
case 0: /* Individual */
|
||||
set_bcl(tr, index);
|
||||
return;
|
||||
case TBCLGRP0: /* 0, 1&2, 3&4, 5&6 */
|
||||
if (index == 0) {
|
||||
update_bcls(tr, index, 1);
|
||||
} else if (index == 1 || index == 3 || index == 5) {
|
||||
update_bcls(tr, index, 2);
|
||||
}
|
||||
return;
|
||||
case TBCLGRP1: /* 0, 1&2&3, 4&5&6 */
|
||||
if (index == 0) {
|
||||
update_bcls(tr, index, 1);
|
||||
} else if (index == 1 || index == 4) {
|
||||
update_bcls(tr, index, 3);
|
||||
}
|
||||
return;
|
||||
case TBCLGRP1 | TBCLGRP0: /* All at once */
|
||||
if (index == 1) {
|
||||
update_bcls(tr, 0, tr->size);
|
||||
}
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
static void comparator_step(struct timer *tr, int index)
|
||||
{
|
||||
if (tr->timer_type == TIMER_TYPE_A) {
|
||||
if (tr->tar == get_ccr(tr, index)) {
|
||||
tr->ctls[index] |= CCIFG;
|
||||
if (tr->ctls[index] & CCI)
|
||||
tr->ctls[index] |= SCCI;
|
||||
else
|
||||
tr->ctls[index] &= ~SCCI;
|
||||
}
|
||||
}
|
||||
|
||||
if (tr->timer_type == TIMER_TYPE_B) {
|
||||
const uint16_t mc = tr->tactl & (MC1 | MC0);
|
||||
const uint16_t clld = tr->ctls[index] & (CLLD1 | CLLD0);
|
||||
if (tr->tar == 0) {
|
||||
if (clld == CLLD0 || (clld == CLLD1 && mc != 0)) {
|
||||
update_bcl_group(tr, index);
|
||||
}
|
||||
}
|
||||
if (tr->tar == get_ccr(tr, index)) {
|
||||
tr->ctls[index] |= CCIFG;
|
||||
if ((clld == CLLD1 && mc == (MC1 | MC0)) ||
|
||||
clld == (CLLD1 | CLLD0)) {
|
||||
update_bcl_group(tr, index);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void timer_step(struct simio_device *dev,
|
||||
uint16_t status, const int *clocks)
|
||||
{
|
||||
|
|
@ -456,16 +675,10 @@ static void timer_step(struct simio_device *dev,
|
|||
for (i = 0; i < pulse_count; i++) {
|
||||
int j;
|
||||
|
||||
for (j = 0; j < tr->size; j++)
|
||||
if (!(tr->ctls[j] & CAP) && (tr->tar == tr->ccrs[j])) {
|
||||
if (tr->ctls[j] & CCI)
|
||||
tr->ctls[j] |= SCCI;
|
||||
else
|
||||
tr->ctls[j] &= ~SCCI;
|
||||
|
||||
tr->ctls[j] |= CCIFG;
|
||||
}
|
||||
|
||||
for (j = 0; j < tr->size; j++) {
|
||||
if (!(tr->ctls[j] & CAP))
|
||||
comparator_step(tr, j);
|
||||
}
|
||||
tar_step(tr);
|
||||
}
|
||||
}
|
||||
|
|
@ -473,22 +686,24 @@ static void timer_step(struct simio_device *dev,
|
|||
const struct simio_class simio_timer = {
|
||||
.name = "timer",
|
||||
.help =
|
||||
"This peripheral implements the Timer_A module.\n"
|
||||
"\n"
|
||||
"Constructor arguments: [size]\n"
|
||||
" Specify the number of capture/compare registers.\n"
|
||||
"\n"
|
||||
"Config arguments are:\n"
|
||||
" base <address>\n"
|
||||
" Set the peripheral base address.\n"
|
||||
" irq0 <interrupt>\n"
|
||||
" Set the interrupt vector for CCR0.\n"
|
||||
" irq1 <interrupt>\n"
|
||||
" Set the interrupt vector for CCR1.\n"
|
||||
" iv <address>\n"
|
||||
" Set the interrupt vector register address.\n"
|
||||
" set <channel> <0|1>\n"
|
||||
" Set the capture input value on the given channel.\n",
|
||||
"This peripheral implements the Timer_A and Timer_B module.\n"
|
||||
"\n"
|
||||
"Constructor arguments: [size]\n"
|
||||
" Specify the number of capture/compare registers.\n"
|
||||
"\n"
|
||||
"Config arguments are:\n"
|
||||
" base <address>\n"
|
||||
" Set the peripheral base address.\n"
|
||||
" type <A|B>\n"
|
||||
" Set timer type.\n"
|
||||
" irq0 <interrupt>\n"
|
||||
" Set the interrupt vector for CCR0.\n"
|
||||
" irq1 <interrupt>\n"
|
||||
" Set the interrupt vector for CCR1.\n"
|
||||
" iv <address>\n"
|
||||
" Set the interrupt vector register address.\n"
|
||||
" set <channel> <0|1>\n"
|
||||
" Set the capture input value on the given channel.\n",
|
||||
|
||||
.create = timer_create,
|
||||
.destroy = timer_destroy,
|
||||
|
|
|
|||
|
|
@ -0,0 +1,30 @@
|
|||
TESTS = test_timer
|
||||
|
||||
UTIL_OBJS=btree.o chipinfo.o ctrlc.o dis.o expr.o list.o opdb.o output.o stab.o util.o vector.o
|
||||
DRIVERS_OBJS=device.o
|
||||
|
||||
CFLAGS=-ggdb -I../../simio -I../../drivers -I../../util
|
||||
LIBS=-lpthread
|
||||
|
||||
OBJS+=$(foreach obj, $(UTIL_OBJS), ../../util/$(obj))
|
||||
OBJS+=$(foreach obj, $(DRIVERS_OBJS), ../../drivers/$(obj))
|
||||
|
||||
test: $(TESTS)
|
||||
@for test in $(TESTS); do echo "==== $${test} ===="; ./$${test}; done
|
||||
|
||||
test_timer.o : ../simio_timer.c
|
||||
|
||||
define add-obj-rule
|
||||
$(1): $(1:.o=.c)
|
||||
$$(CC) $$(CFLAGS) -c $$< -o $$@
|
||||
endef
|
||||
$(foreach obj, $(OBJS), $(eval $(call add-obj-rule, $(obj))))
|
||||
|
||||
define add-test-rule
|
||||
$(1): $(1).o $(OBJS)
|
||||
$$(CC) -o $$@ $$< $(OBJS) $(LIBS)
|
||||
endef
|
||||
$(foreach test, $(TESTS), $(eval $(call add-test-rule, $(test))))
|
||||
|
||||
clean:
|
||||
-rm -f $(TESTS:=.o) $(TESTS)
|
||||
File diff suppressed because it is too large
Load Diff
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Reference in New Issue