Yes, I primarily just want to get rid of strcat (which is checked and
appears to be OK, but still, it's 2018).
Also bring behaviour in line with manual and common expectations:
- In absence of MSPDEBUG_TILIB_PATH, the dynamic linker search
path is processed
- If MSPDEBUG_TILIB_PATH is specified, that directory is searched
- The original behaviour in case of an error is graceful fall-through
to letting the dynamic linker do its deed
- The behaviour is changed such that if MSPDEBUG_TILIB_PATH is specified,
only that path is being considered.
This is in line with both manual and common sense (otherwise one
could have just used LD_LIBRARY_PATH).
- Fix sim driver so that it can handle two bytes read/write.
- Add error message regarding odd size write to sim driver.
- Fix simio_timer constructor so that can accept size.
- Fix simio_timer so that we read/write channels' registers.
Indent the jtbp_close() function consistently with tabs in order to fix
for GCC 7's flagging of this warning:
drivers/jtdev_bus_pirate.c: In function ‘jtbp_close’:
drivers/jtdev_bus_pirate.c:189:5: warning: this ‘if’ clause does not guard... [-Wmisleading-indentation]
if(write(p->port, &out_buff, 1));
^~
drivers/jtdev_bus_pirate.c:191:2: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the ‘if’
close(p->port);
^~~~~
Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
This is extremely slow at programming things, but is very useful for
unbricking an MSP-FET430UIF if you have a bus pirate and no other
programmers around.
According to (not very good) documentation and empiric testing
BSL expects sizes of buffers sends to both sides to be even.
The same applies to memory addresses.
The "regs" command indicates when the PC is sitting on an enabled
breakpoint. The simulator emits debug output when a watchpoint is
triggered by a simulated instruction.
The Olimex JTAG adapter occasionally emits an extra 0xff before sending
its reply to the C_INITIALIZE message. A small change to the FET packet
parser works around this.
Problem and original solution reported by Yingwei Li <ysulyw@gmail.com>.
Entry added for chip ID 0x0382 (MSP430F5255)
Flash/RAM Memory layout and EEM debugging facilities have been set
according to device data-sheet. (msg28_data, msg29_data,
MSP430_STORED_INFO entries)
Flags and Parameters in msg2b_data copied from MSP430F5437A - couldn't
find any documentation on those. msg29_params copied from MSP430F5437A
- couldn't find any documentation on those
Chip detection, flashing and single step debugging with gdb tested with
MSP430F5255 using olimex-v1 hw-debugger
Signed-off-by: Jan Willeke <willeke@smartmote.de>
Triss
Daniel Beer
iddq
Dennis de Lange
Tamas TEVESZ
Daniel O'Connor
Tadashi G. Takaoka
Andrew Bradford
Alex Orange
Jan Pohanka
Hiroki Mori
John Pitney
David Siroky
zcsahok
Eric Price
Peter Bägel (DF5EQ)