BLAHAJ
/
libsigrok
10
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
4,794 Commits 3 Branches 14 Tags 10 MiB
Commit Graph

4794 Commits

Author SHA1 Message Date
Gerhard Sittig ed367d6820 input/vcd: abort VCD import when timestamp counts backwards 
The VCD specification requests that timestamps will strictly increase as
one advances through the file. Add another check where the previous
implementation resulted in a tight loop and made the application stall.
Do print an error message and abort file processing in that case.

This fixes bug #1250.
 2018-07-22 16:15:26 +02:00
Uwe Hermann e6104296c2 sr_buildinfo_libs_get(): Show LIBUSB_API_VERSION. 2018-07-19 23:56:33 +02:00
Uwe Hermann 9bf093011a configure.ac: Emit a warning if the C++ bindings are not being built. 2018-07-17 22:25:40 +02:00
Uwe Hermann 51bf39a163 strutil: Fix unit test failure (bug #1093). 
Patch by Wojciech Lazarski, thanks a lot!
 2018-07-17 19:06:05 +02:00
Gerhard Sittig 3387a5d8ee output: simplify trigger marker position calculation (readability) 
This amends commit 67b345b981 which fixed the calculation of the
trigger marker's position. Improve readability of the formulae and
adjust comments.
 2018-07-15 20:47:08 +02:00
Gerhard Sittig 67b345b981 output: fixup trigger marker position in ascii/bits/hex output modules 
Adjust the calculation of the '^' marker's position in T: lines of the
-O ascii/bits/hex output modules such that it matches the sample data
lines' layout. Add comments which discuss the motivation of the marker
position's calculation, which differs among each of those modules.

Strictly speaking -O bits was already correct. But I chose to adjust and
comment the logic such that multiple output modules follow a common
pattern. If performance is an issue, the bits.c change might be worth
reverting.

This commit fixes bug #1238.
 2018-07-15 19:40:00 +02:00
Uwe Hermann 769561cbe9 std: Improve prototypes of some functions. 2018-06-26 16:42:43 +02:00
Uwe Hermann 0f523f2b45 rigol-ds: Add initial Agilent MSO7034A support. 
Digital channels (and various other features) are not yet supported.
 2018-06-22 22:53:11 +02:00
Uwe Hermann 9ad1d49c4c rigol-ds: Improve a log message. 2018-06-22 19:20:44 +02:00
Uwe Hermann c26107b745 siglent-sds: Drop currently unused switch/case. 2018-06-22 18:54:28 +02:00
Uwe Hermann eb354840f0 siglent_sds_channel_start(): Use ternary operator to shorten code. 2018-06-22 18:54:28 +02:00
Uwe Hermann 55bece00aa rigol-ds: Add missing "return SR_ERR". 2018-06-22 10:53:03 +02:00
marchelh e5b41b8d7e siglent-sds: Fixed samplerate and memory depth calculation 2018-06-22 10:51:50 +02:00
marchelh 7e776c70b0 siglent-sds: Fix, USB connection problem partially solved, bug #1130 2018-06-22 10:51:39 +02:00
Uwe Hermann 5e7ac9f9ec udev: Add rule for Rigol DS4000 series devices. 2018-06-22 01:55:15 +02:00
Valentin Ochs 6b04525ba2 rigol-ds: Initial patch for Rigol DS4000 support 
This fixes bug #1208.
 2018-06-22 01:55:02 +02:00
Valentin Ochs 643c8824a5 rigol-ds: Rename the CHANINFO macro and comment it 2018-06-22 00:47:09 +02:00
Valentin Ochs 6bcc81ac3a rigol-ds: Store trigger sources and their number for each model 
Store trigger sources and their number for each model when it is probed
and use that.

This fixes bug #299.
 2018-06-22 00:35:44 +02:00
Uwe Hermann 32054b0963 tests: Expand test_analog_unit_to_string unit test. 2018-06-19 18:22:42 +02:00
Uwe Hermann 72cb20ed07 tests: Fix test_analog_unit_to_string unit test. 
The loop body was never executed.
 2018-06-19 18:22:42 +02:00
Uwe Hermann c5c6fa0f22 serial-dmm: Fix Voltcraft VC-96 sorting. 2018-06-18 16:30:04 +02:00
Uwe Hermann 4a6751fd07 dmm/vc96: Drop some obsolete debug output. 2018-06-18 16:30:04 +02:00
Matthias Schulz 9456d63610 Add support for the Voltcraft VC-96 DMM. 2018-06-18 16:30:04 +02:00
Adrian Stratulat b8fcae5a12 dtm0660: Do not apply the exponent twice on the value 
This fixes bug #1236.
 2018-06-18 15:26:46 +02:00
Joerg Alpers 10481ef05d Fix: Bug #1188 DSLogic triggering 2018-06-16 19:31:44 +02:00
JohnCh ab2b21fb68 fluke-45: Add initial driver implementation. 2018-06-15 15:48:49 +02:00
JohnCh e756c595b6 fluke-45: Initial driver skeleton. 2018-06-15 15:05:04 +02:00
Uwe Hermann f1e82915a8 gwinstek-gpd: Fix sr_dev_driver struct. 2018-06-15 00:18:22 +02:00
Uwe Hermann 380d3b2ae8 gwinstek-gpd: Avoid some unnecessary assignments. 2018-06-14 22:48:26 +02:00
Uwe Hermann eaa8c6597b gwinstek-gpd: Drop some unneeded debug logs. 2018-06-14 22:48:26 +02:00
Bastian Schmitz b872ab7d30 gwinstek-gpd: Initial implementation. 2018-06-14 14:19:08 +02:00
Soeren Apel 5eb39a91f3 wav: Don't assume CHUNK_SIZE >= total_samples 2018-06-06 22:07:04 +02:00
Uwe Hermann bf2a6eeaa0 hantek-4032l: Minor cosmetic fix. 2018-06-06 00:01:04 +02:00
Uwe Hermann c7b5c3588e hantek-4032l: Rename 'devc->buffer' to 'devc->buf'. 
This is shorter and also avoids confusion with transfer->buffer.
 2018-06-05 23:59:24 +02:00
Uwe Hermann 7b9387b8f0 hantek-4032l: Rename number_samples to num_samples. 2018-06-05 23:56:30 +02:00
Uwe Hermann 264a4cb2b8 hantek-4032l: Use MIN() where possible. 2018-06-05 23:55:23 +02:00
Uwe Hermann cbc656e45f hantek-4032l: Simplify some config_get/_set parts. 
Also, drop some unneeded checks.
 2018-06-05 23:43:23 +02:00
Uwe Hermann 583fc126d0 hantek-4032l: config_set(): Simplify SR_CONF_CAPTURE_RATIO case. 
The sr_config_set() wrapper already checks the value.
 2018-06-05 23:16:02 +02:00
Uwe Hermann 2dcd904c18 hantek-4032l: Drop some unneeded malloc checks. 
As per guidelines in HACKING.
 2018-06-05 23:02:58 +02:00
Uwe Hermann 61803a29aa hantek-4032l: Reduce indentation level a bit. 2018-06-05 22:59:29 +02:00
Uwe Hermann b8a954c586 zketech-ebd-usb: Fix a compiler warning. 2018-06-05 22:01:12 +02:00
Andrej Valek f49065c668 hantek-4032l: Add support for external clocks. 
These options are NOT available for FPGA version 0.

- add option to select edge type

Signed-off-by: Andrej Valek <andy@skyrain.eu>
 2018-06-05 22:01:12 +02:00
Andrej Valek bc294eaca8 Add SR_CONF_EXTERNAL_CLOCK_SOURCE key. 
Signed-off-by: Andrej Valek <andy@skyrain.eu>
 2018-06-05 22:01:12 +02:00
Andrej Valek 2a80186103 hantek-4032l: Separate threshold channels. 
Split global threshold into channels A and B.

Signed-off-by: Andrej Valek <andy@skyrain.eu>
 2018-06-05 22:01:12 +02:00
Andrej Valek caad0024fb hantek-4032l: Set new pwm threshold handling. 
Calculate threshold values from <-6.0;6.0> range.

Signed-off-by: Andrej Valek <andy@skyrain.eu>
 2018-06-05 17:16:39 +02:00
Andrej Valek 3dc976fe9f hantek-4032l: Implement trigger handling. 
Send trigger position to upper layer.

Signed-off-by: Andrej Valek <andy@skyrain.eu>
 2018-06-05 17:16:39 +02:00
Andrej Valek 4b75f84c01 hantek-4032l: Set maximum samples size to 64MB. 
Signed-off-by: Andrej Valek <andy@skyrain.eu>
 2018-06-05 17:11:43 +02:00
Andrej Valek 2958315ded hantek-4032l: Increase speed of data getting. 
- add support for multiple transfers.
 - set nummber of samples to 1 for FPGA FW version 0
- increase size of data transfer buffer to 2kB.

Signed-off-by: Andrej Valek <andy@skyrain.eu>
 2018-06-05 17:10:14 +02:00
Andrej Valek 43d8603571 hantek-4032l: Separate USB receive callbacks. 
Callback for data transfer is separated from status. This change will be
used for better data transfer sending/receiving. Cast signal, that trigger
has been captured was moved into state: H4032L_STATUS_FIRST_TRANSFER.

Signed-off-by: Andrej Valek <andy@skyrain.eu>
 2018-06-05 16:57:48 +02:00
Andrej Valek 7a7afc0086 hantek-4032l: Get FGPA version. 
- get FPGA version in dev_open
 - enable some features only for newer FPGA
- decrease printing number of message of FPGA version

Signed-off-by: Andrej Valek <andy@skyrain.eu>
 2018-06-05 16:57:48 +02:00