Currently, kicad_pcb files have a (version ...) tag, but it is ignored. This
commit does the following:
1. Parse the version. If it's later than the last supported version, present an
alternative error message suggesting an upgrade if the file does not load
correctly. The version will be interpreted as an integer YYYYMMDD to suggest
a KiCad release date.
2. Accept a (version ...) tag also in kicad_mod files, but do not write them
yet. If no version tag is present in these files, assume the version to be that
of the current format version at the time of this commit.
This is meant to be merged to the 4.x stable series, and preps for KiCad 5
which will start emitting version tags also in footprints - users with what
will then be 'old stable' will not get a parse error when we introduce this for
footprints, and we can safely increment the format version later.
* Fix a StrPrintf() %s count mismatch bug
* Better comments
* Use std::string::data() instead of a ref to the first char to get the str::string buffer (should not change anything with GNU lib)
PAD_SHAPE_T and PAD_ATTR_T still have a double definition (new names and old names) to be sure python scripts are nor broken by the change.
PAD_DRILL_SHAPE_T does not have a double definition, because it is unlikely oblong holes are used in python scripts.
Double definitions will be removed in the (next) future.
* Cleanup namespace in enum ZoneConnection in pcbnew/zones.h to self-explained names unification: PAD_ZONE_CONN_INHERITED, PAD_ZONE_CONN_NONE,PAD_ZONE_CONN_THERMAL,PAD_ZONE_CONN_FULL, PAD_ZONE_CONN_THT_THERMAL
these options are used in GAL mode, but the usercannot control this visibility. So if the board file does not have these visibility flags set, the GAL never show them.
Fix also a compil warning.
legacy plugin: better compatibility with old brd files (current track width and current vias size, stored in SETUP section, were not read from file and incorrectly set)
* Delete Single Pad Net option does not delete the net if a zone use this net (i.e. is attached to this pad).
* pcb_parser accept now negative netcodes in zones (can happen with old files, which previously could crash Pcbnew)
* pcb_parser accept now files with incorrect or missing net count (can happen with old files, which previously could crash Pcbnew)
* if a zone has a non-existent net name it now keep this net name, and DRC detect it (previously, the net name was lost, and the DRC did not tected this issue).
* Drc test: now detect a "dead" net, i.e. a net with 0 pads, but still used by a zone. It happens easily after a schematic modification, when a net disappears or is renamed.
Looked like a minor issue, but was due to a more serious bug, when using 2 different DSN_LEXERS which were not synchronized.
The fix is not perfect, but unfortunately, the parser used to read the PCB_PLOT_PARAMS in .kicad_pcb files is also used in legacy board file reader.
Therefore it is better than write 2 parser functions, one for legacy files, the other for the .kicad_pcb files, which make the same thing.
*) When kicad.exe closes a project, close any open KIFACEs so that they cannot
get disassociated from their true PROJECT.
*) Allow loading eeschema library editor from kicad.exe
*) Allow loading pcbnew library editor from kicad.exe
*) Rename LIB_COMPONENT to LIB_PART.
*) Add class PART_LIBS, and PART_LIB.
*) Make PART_LIBS non-global, i.e. PROJECT specific.
*) Implement "data on demand" for PART_LIBS
*) Implement "data on demand" for schematic SEARCH_STACK.
*) Use RSTRINGs to retain eeschema editor's notion of last library and part being edited.
*) Get rid of library search on every SCH_COMPONENT::Draw() call, instead use
a weak pointer.
*) Remove all chdir() calls so projects don't need to be CWD.
*) Romove APPEND support from OpenProjectFiles().
*) Make OpenProjectFiles() robust, even for creating new projects.
*) Load EESCHEMA colors in the KIWAY::OnKiwayStart() rather in window open,
and save them in the .eeschema config file, not in the project file.
*) Fix bug with wxDir() while accessing protected dirs in kicad.exe
*) Consolidate template copying into PROJECT class, not in kicad.exe source.
*) Generally untangle eeschema, making its libraries not global but rather
held in the PROJECT.
2) Fix passing wxString to common/config_params so lookup keys
can be dynamically generated. This gives ~/.kicad files all the colors.
3) Fix LEGACY_PLUGIN so it loads all layer types and masks properly.
4) Extend the table in router/pns_index.h to 128 from 64.
2) Change from legacy Cu stack to counting down from top=(F_Cu or 0).
The old Cu stack required knowing the count of Cu layers to make
sense of the layer number when converting to many exported file types.
The new Cu stack is more commonly used, although ours still gives
B_Cu a fixed number.
3) Introduce class LSET and enum LAYER_ID.
4) Change *.kicad_pcb file format version to 4 from 3.
5) Change fixed names Inner1_Cu-Inner14_Cu to In1_Cu-In30_Cu and their
meanings are typically flipped.
6) Moved the #define LAYER_N_* stuff into legacy_plugin.cpp where they
can die a quiet death, and switch to enum LAYER_ID symbols throughout.
7) Removed the LEGACY_PLUGIN::Save() and FootprintSave() functions.
You will need to convert to the format immediately, *.kicad_pcb and
*.kicad_mod (=pretty) since legacy format was never going to know
about 32 Cu layers and additional technical layers and the reversed Cu
stack.
Removed SetCurrentClassName() (it was not used anywhere and less safe than SetCurrentClass()).
Added BOARD_DESIGN_SETTIGNS::GetDefault() to make some pieces of shorter and clearer.
Most of the changes are just adding GetDesignSettings() before every occurence of m_NetClasses.
More complex changes:
class_netclass.cpp - NETCLASS does not store the pointer to the parent BOARD anymore. Added function SetParams( BOARD_DESIGN_SETTINGS& ).
class_netclass.h - Removed GetTrackMinWidth(), GetViaMinDiameter(), GetViaMinDrill(), GetuViaMinDiameter(), GetuViaMinDrill() as they were refering to BOARD_DESIGN_SETTINGS anyway (they are not net class specific).
kicad_plugin.cpp - filters out empty nets (that are anyway not saved) when storing net class information. Previously it was done in NETCLASS::Format() function.
- SEGVIA becomes VIA
- Drill size moved from TRACK to VIA
- Removed shape from TRACK, becomes ViaType in VIA
- GetTrace becomes GetTrack, for uniformity
- Some minor constification and typo fixes
Renamed BOARD_CONNECTED_ITEM::SetNet() -> SetNetCode()
Added BOARD_CONNECTED_ITEM::GetNet() for accessing NETINFO_ITEM* of a given item.
Fixed module editor crash when launched to edit a module from a PCB.
Replaced some BOARD::FindNet( item->GetNet() ) calls with BOARD_CONNECTED_ITEM::GetNet().
Renamed BOARD_CONNECTED_ITEM::SetNet() -> SetNetCode()
Added BOARD_CONNECTED_ITEM::GetNet() for accessing NETINFO_ITEM* of a given item.
Fixed module editor crash when launched to edit a module from a PCB.
Replaced some BOARD::FindNet( item->GetNet() ) calls with BOARD_CONNECTED_ITEM::GetNet().