Commit Graph

108 Commits

Author SHA1 Message Date
Dick Hollenbeck 611592029f fix Inner1.Cu in pcb_parser.cpp, start cvpcb work. 2014-07-05 15:42:59 -05:00
Lorenzo Marcantonio e2e4fc4830 Added missing support for reading the *.CrtYd layer token 2014-07-05 14:35:18 +02:00
Dick Hollenbeck 4d9f87bf0b fix BUG parsing the kicad_pcb (layers ..) declaration section. First non-cu was being dropped. 2014-06-30 13:45:43 -05:00
Dick Hollenbeck 575f13d887 fix VIA::IsOnLayer() 2014-06-29 23:40:16 -05:00
Dick Hollenbeck 3aa880dedb fix pcb_parser for new board, coding standards 2014-06-29 16:50:06 -05:00
Dick Hollenbeck 06bf0821b9 fix LSET() constructors, formatting 2014-06-29 15:33:29 -05:00
Dick Hollenbeck add4d5eb6f re-work the LSET(int,...) constructor 2014-06-29 13:09:32 -05:00
Dick Hollenbeck b920fa00a5 1) Fix compiles using wx 3.x and 2.8.
2) Fix passing wxString to common/config_params so lookup keys 
   can be dynamically generated.  This gives ~/.kicad files all the colors.
3) Fix LEGACY_PLUGIN so it loads all layer types and masks properly.
4) Extend the table in router/pns_index.h to 128 from 64.
2014-06-24 23:36:02 -05:00
Dick Hollenbeck 4578ea8b9e 1) Add 32 Cu Layers.
2) Change from legacy Cu stack to counting down from top=(F_Cu or 0).
   The old Cu stack required knowing the count of Cu layers to make
   sense of the layer number when converting to many exported file types.
   The new Cu stack is more commonly used, although ours still gives
   B_Cu a fixed number.
3) Introduce class LSET and enum LAYER_ID.
4) Change *.kicad_pcb file format version to 4 from 3.
5) Change fixed names Inner1_Cu-Inner14_Cu to In1_Cu-In30_Cu and their
   meanings are typically flipped.
6) Moved the #define LAYER_N_* stuff into legacy_plugin.cpp where they
   can die a quiet death, and switch to enum LAYER_ID symbols throughout.
7) Removed the LEGACY_PLUGIN::Save() and FootprintSave() functions.
   You will need to convert to the format immediately, *.kicad_pcb and
   *.kicad_mod (=pretty) since legacy format was never going to know
   about 32 Cu layers and additional technical layers and the reversed Cu
   stack.
2014-06-24 11:17:18 -05:00
Maciej Suminski 2af3e5f6e9 bugfix #1325743: cvpcb crashes when opening any netlist. 2014-06-03 09:32:57 +02:00
Maciej Suminski fa846932c1 bugfix 1325375: pcbnew crash while append a board 2014-06-02 11:41:54 +02:00
Maciej Suminski f31f92e45e Fixes the bug that causes pcbnew crash, when there are multiple net classes and the plot dialog was opened.
Changed NETCLASS* to boost::shared_ptr<NETCLASS>.
2014-05-20 11:29:37 +02:00
Maciej Suminski 4fcaf4c586 Minor BOARD_DESIGN_SETTINGS refactoring.
Removed SetCurrentClassName() (it was not used anywhere and less safe than SetCurrentClass()).
Added BOARD_DESIGN_SETTIGNS::GetDefault() to make some pieces of shorter and clearer.
2014-05-15 10:51:08 +02:00
Maciej Suminski d9eb15c9fa Moved NETCLASSES to BOARD_DESIGN_SETTINGS.
Most of the changes are just adding GetDesignSettings() before every occurence of m_NetClasses.
More complex changes:
class_netclass.cpp - NETCLASS does not store the pointer to the parent BOARD anymore. Added function SetParams( BOARD_DESIGN_SETTINGS& ).
class_netclass.h - Removed GetTrackMinWidth(), GetViaMinDiameter(), GetViaMinDrill(), GetuViaMinDiameter(), GetuViaMinDrill() as they were refering to BOARD_DESIGN_SETTINGS anyway (they are not net class specific).
kicad_plugin.cpp - filters out empty nets (that are anyway not saved) when storing net class information. Previously it was done in NETCLASS::Format() function.
2014-05-13 11:22:51 +02:00
Maciej Suminski cd8aaee160 Moved most of the board design rules related fields & methods to BOARD_DESIGN_SETTINGS class. 2014-05-13 11:22:51 +02:00
Maciej Suminski c3b448b633 Upstream merge. 2014-05-01 15:55:50 +02:00
Lorenzo Marcantonio 3f2c0e1a8d TRACK/SEGVIA cleanup
- SEGVIA becomes VIA
- Drill size moved from TRACK to VIA
- Removed shape from TRACK, becomes ViaType in VIA
- GetTrace becomes GetTrack, for uniformity
- Some minor constification and typo fixes
2014-04-25 08:00:04 +02:00
Maciej Suminski 23392ce8c9 Upstream merge. 2014-04-02 15:38:59 +02:00
jean-pierre charras 0f09c15f11 Pad editor dialog: Better tests and error messages about issues in pad settings. Fis also an other hard to translate error messge. 2014-03-19 21:06:09 +01:00
Maciej Suminski e6571f6862 Added new constraint for EDIT_POINTs (EPC_LINE).
Dimensions have EDIT_POINTs.
Different handling of 45 degree mode in POINT_EDITOR.
2014-03-12 10:46:11 +01:00
Maciej Suminski f7d00a393b Renamed BOARD_CONNECTED_ITEM::GetNet() -> GetNetCode()
Renamed BOARD_CONNECTED_ITEM::SetNet() -> SetNetCode()
Added BOARD_CONNECTED_ITEM::GetNet() for accessing NETINFO_ITEM* of a given item.
Fixed module editor crash when launched to edit a module from a PCB.
Replaced some BOARD::FindNet( item->GetNet() ) calls with BOARD_CONNECTED_ITEM::GetNet().
2014-02-25 11:47:27 +01:00
Maciej Suminski 75026d8754 Renamed BOARD_CONNECTED_ITEM::GetNet() -> GetNetCode()
Renamed BOARD_CONNECTED_ITEM::SetNet() -> SetNetCode()
Added BOARD_CONNECTED_ITEM::GetNet() for accessing NETINFO_ITEM* of a given item.
Fixed module editor crash when launched to edit a module from a PCB.
Replaced some BOARD::FindNet( item->GetNet() ) calls with BOARD_CONNECTED_ITEM::GetNet().
2014-02-25 11:40:34 +01:00
Maciej Suminski 46db6ac182 Removed redundant fields DIMENSION::m_arrowD1O, m_arrowD2O, m_arrowG1O, m_arrowG2O (==m_crossBarO/F).
Added DIMENSION::SetOrigin(), DIMENSION::SetEnd(), DIMENSION::GetOrigin(), DIMENSION::GetEnd(), DIMENSION::GetHeight().
Fixed flipping for DIMENSION class.
Added an information that helps to understand roles of the points in the DIMENSION class.
Some minor changes to PCB_PAINTER (mainly using const COLOR4D& for taking the result of GetColor() function).
2014-02-11 13:22:30 +01:00
Maciej Suminski 3f5c3d4349 Minor changes (fix cvpcb build issue, wx2.8 compatibility, some other stuff). 2014-02-03 16:02:54 +01:00
Maciej Suminski 510fee1358 Another way of handling items for the ratsnest (clearer and now finally supports undo/redo of the PNS created tracks). 2014-01-30 15:46:39 +01:00
Maciej Suminski 7f6bc781aa Upstream merge. 2014-01-28 10:43:55 +01:00
Maciej Suminski 15b8d3d20a Added NETINFO_MAPPING, to ease saving nets with consecutive net codes (without modifying the net codes during the run time).
Now, nets are saved with consecutive net codes (both modern & legacy plugins).
Zones are saved together with their nets, without depending on the fact if there are any pads with such net. Therefore validation of zone net names was removed (pcbnew/class_board.cpp).

Performed tests:
- Changed a pad's net name from empty to existent - ok, name was changed.
- Changed a pad's net name from empty to nonexistent - ok, error message is displayed, net name stays empty.
- Changed a pad's net name from existent to empty - ok, net name became empty
- Changed a pad's net name from existent to nonexistent - ok, error message is displayed, net name is not changed.

- Drawn a zone that belongs to a net, then modified schematics so the net does not exist anymore. After reloading the net list, all pads/tracks are updated. Zones still belongs to the net that does not exist in the schematic (but still exists in .kicad_pcb file). After running DRC, the zone becomes not filled.
- Undo & redo affects assignment of a polygon to a specific net (you may change net of a polygon, refill it and undo/redo the changes).

- KiCad s-expr & legacy, Eagle, P-CAD boards seem to load without any problem (they also contain correct net names assigned to the appropriate pads). All types of board file formats were loaded, then saved in sexpr format and reopened with a KiCad built from the master branch (without my modifications).
- A few boards were also saved using the legacy format and were opened with the master KiCad without any issues.

- Change a net name for a pad, restore with undo/redo - ok
- Remove everything, restore with undo - ok
- Remove everything, reload netlist - ok

Differences observed between files saved by the master branch KiCad and this one:
- list of nets are not saved in any particular order, so net codes may differ
- the default net class does not contain the unconnected net
2014-01-28 10:19:51 +01:00
jean-pierre charras 3354bdde05 Pcbnew: fix bug #1272714 . Code cleanup: use 2 different enums for pad shapes and pad drill shapes. Remove never used pad shape. 2014-01-26 15:20:58 +01:00
jean-pierre charras f7ca6e4bf9 add patch from Cirilo Bernardo, and minor fixes. 2014-01-25 13:23:29 +01:00
Maciej Suminski d62b47a0df BOARD_CONNECTED_ITEMs do not store net code anymore (m_NetCode field), instead net info is stored using a pointer to NETINFO_ITEM.
GetNet() refers to the net code stored in the NETINFO_ITEM. SetNet() finds an appropriate NETINFO_ITEM and uses it.
Removing GetNet() & SetNet() (and the whole net code idea) requires too many changes in the code (~250 references to the mentioned functions).
BOARD_CONNECTED_ITEMs by default get a pointer to NETINFO_ITEM that stores unconnected items. This requires for all BOARD_CONNECTED_ITEMs to have a parent (so BOARD* is accessible). The only orphaned item is BOARD_DESIGN_SETTINGS::m_Pad_Master, but it does not cause any issues so far.
Items that do not have access to a BOARD (do not have set parents) and therefore cannot get net assigned, by default get const static NETINFO_LIST::ORPHANED.

Performed tests:
- loaded .kicad_pcb, KiCad legacy board, Eagle 6.0 board, P-CAD board - all ok
- load a simple project, reload netlist after changing connections in eeschema - ok
- save & reload a board - ok, but still contain empty nets
- remove everything, restore with undo - ok
- remove everything, reload netlist - ok
- changing net names (all possibilites: empty->existing, empty->not existing, existing->empty, existing->not existing) - all ok
- zones: when net is changed to a net that does not have any nodes besides the zone itself, it does not get filled
2014-01-15 18:03:06 +01:00
Maciej Suminski 3017b61711 Added NETINFO_LIST::UNCONNECTED constant. 2014-01-15 09:34:16 +01:00
Maciej Suminski 78732f13f7 Removed:
- ZONE_CONTAINER::m_Netname field
- ZONE_CONTAINER::SetNetName()
- ZONE_CONTAINER::SetNet() [it uses the one in BOARD_CONNECTED_ITEM]
- ZONE_CONTAINER::GetNetName() [instead BOARD_CONNECTED_ITEM::GetNetname is used]
- ZONE_CONTAINER::SetNetNameFromNetCode()

Performed tests:
- Drawn a zone that belongs to a net, then modified schematics so the net does not exist anymore. After reloading the net list, all pads/tracks are updated. Zones still belongs to the net that does not exist in the schematic (but still exists in .kicad_pcb file). After running DRC, the zone becomes not filled.
- Undo & redo affects assignment of a polygon to a specific net (you may change net of a polygon, refill it and undo/redo the changes).
2014-01-14 11:41:06 +01:00
Maciej Suminski 654e7e556e Removed D_PAD::SetNetname() function and D_PAD::m_Netname, D_PAD::m_ShortNetname fields.
D_PAD::GetNetname() and D_PAD::GetShortNetname() were moved to BOARD_CONNECTED_ITEM. Now they use the net name stored in NETINFO_ITEM.
Moved some one-line functions from class_board_connected_item.cpp to class_board_connected_item.h.
Added a copyright notice, moved Doxygen comments from class_board_connected_item.cpp to class_board_connected_item.h.

I have some doubts if changes introduced pcbnew/dialogs/dialog_pad_properties.cpp do not break anything, but I could not find a test case that breaks the pcbnew.

Performed tests:
- changed pad's net name from empty to existent - ok, name was changed
- changed pad's net name from empty to nonexistent - ok, error message is displayed, net name stays empty
- changed pad's net name from existent to empty - ok, net name became empty
- changed pad's net name from existent to nonexistent - ok, error message is displayed, net name is not changed
- (re)reading netlists, including net changes - fine, changes are applied, but empty nets are still kept
- loaded pcbnew/pcad2kicadpcb_plugin/examples/CK1202_V1.pcb to test P-CAD import plugin - ok, net names are correct
- imported an Eagle 6.0 board (Arduino Uno; http://arduino.cc/en/uploads/Main/arduino_Uno_Rev3-02-TH.zip) then saved in .kicad_pcb format and reloaded - ok, net names are correct
- saved demos/video/video.kicad_pcb in legacy format and then loaded it again - ok, net names are correct
2014-01-14 10:41:52 +01:00
Maciej Suminski 487b609e76 Removed NETINFO_ITEM::SetNet() and NETINFO_ITEM::SetNetname() methods.
NETINFO_ITEM::m_Net and NETINFO_ITEM::m_Netname are const.

Changes to be verified:
- pcbnew/minimun_spanning_tree.cpp: It segfaults is m_Size == 0
- pcbnew/exporters/export_gencad.cpp: I removed the SetNetname() call, as it changes only the unconnected net and in the next line it returns if the net is unconnected. Still, I wonder if name for the unconnected net matters. What about tests that check if a net name is empty to decide if it is unconnected net or not.
2014-01-09 15:51:47 +01:00
Povilas Kanapickas 7f12513c7e Remove some uses of using namespace std. 2013-12-13 10:27:30 -06:00
Wayne Stambaugh 85777d6569 Pcbnew footprint library plug in fixes and minor code cleaning.
* When loading footprint do not retest every footprint in cache.  Only test
  the footprint being loaded.  Fixes long load times on libraries with a lot
  of parts.
* Fix footprint name bug where file extension was added to the end of the
  footprint name.
* Fix bug in path equivalence test due to Posix path separators in footprint
  library table.  Convert paths to native separator before comparison.
* Fix a bug in FOOTPRINT_VIEWER_FRAME::OnActivate() which cause the footprint
  list to always get reloaded when using footprint library tables.
* Remove some unnecessary debugging messages.
* Add a few Doxygen comments to FP_CACHE in kicad_plugin.cpp.
2013-09-24 14:45:57 -04:00
Wayne Stambaugh 028b0bd3f3 Fix board parsing error when module name is empty. (fixes lp:1226546) 2013-09-17 10:03:16 -04:00
Wayne Stambaugh 0224bc2f58 Fix but reading empty footprints in netlist. (fixes lp:1226283)
* Remove fp_lib token from board and s-expr netlist file format.
* Fix a bunch of Doxygen warnings.
* Remove some extra debug log messages.
2013-09-16 20:52:08 -04:00
jean-pierre charras 50242fd54d Pcbnew: Fix Bug #1224656 2013-09-13 11:58:51 +02:00
Wayne Stambaugh 230c5f8f5a Convert footprint definitions from wxString to FPID.
* Use FPID instead of wxString in MODULE object.
* Use FPID instead of wxString when loading and saving files.
* Use FPID in COMPONENT object.
* Add wxString helper functions and comparison operators to FPID.
* Add fp_lib token to pcb and netlist file formats.
* Add code to load and save FPIDs to pcb file format.
* Fix segfault when deleting invalid footprint library tables in Pcbnew
  in non footprint library table build.
* Fix bug when counting the number of mod files in
  EDA_APP::SetFootprintLibTablePath();
2013-09-08 14:31:21 -04:00
jean-pierre charras 90b820a52c Pcbnew: enhancements for blind/buried vias palcement, and save blind/buried vias allowed option in .kicad_pcb file 2013-08-28 18:14:39 +02:00
Dick Hollenbeck efb34166ea *) retain grid origin in the BOARD and save it in legacy and kicad board files.
*) add hotkey for setting the grid origin as 'S', in board editor, module editor.
*) re-position the function interface for cursor movement from BASE_SCREEN into
   class EDA_DRAW_FRAME.  This is a prelude to getting rid of BASE_SCREEN or
   splitting it up.
2013-08-03 00:15:23 -05:00
Dick Hollenbeck 1f9ee2e45e Support for 'initial single line comments' in the pretty footprint format.
This is limited to round tripping the lines of commented text in the
loading and saving to disk through PCBIO::Format() and PCBIO::Parse().
No editing of the comments is given.
2013-06-23 14:18:33 -05:00
jean-pierre charras 2554575656 More work on CPOLYGONS_LIST class.
Pcbnew: fix minor bug about  plot line width.
2013-05-09 21:08:12 +02:00
Wayne Stambaugh cf86e18f5c Footprint library table work, minor fixes, and code cleaning.
* Fix a bug when full file name and path are passed to FOOTPRINT_INFO::
  ReadFootprintFiles() which I created in bug fix lp:593989.
* Fix a wxString debug assertion in EDA_APP::InitEDA_Appl() when the KICAD
  environment variable is defined as an empty string.
* Add error dialog when libraries cannot be found in system search path
  when loading footprint using the select footprint dialog.
* Add footprint library name column to the EDA_LIST_DIALOG when selecting
  footprints from the list.
* Allow reading all columns from the selected row in EDA_LIST_DIALOG.
* Remove redundant sort from EDA_LIST_DIALOG constructor
* Add library name member variable and accessors to FOOTPRINT_INFO.
* Make headers translatable for Eeschema select component from list dialog.
* Add some helper methods to FPID for identifying the FPID type and validity.
* Remove a bunch of trailing whitespace and add missing license comments.
2013-05-08 16:47:23 -04:00
jean-pierre charras b2a76062c7 All: use CPOLYGONS_LIST, a typedef of std::vector<CPolyPt> to handle a Corners Polygons List.
This is a starting point of some code enhancements relative to polygons in Pcbew and 3D viewer.
2013-05-03 19:51:10 +02:00
Dick Hollenbeck 9634fa5c07 fix 2 corner case bugs in specctra import 2013-05-01 10:48:00 -05:00
Dick Hollenbeck d8ba7b3af8 pcb_parser failed on (fill yes (arc_segments 16) (thermal_gap 1.99898) (thermal_bridge_width 1.99898))
See http://tech.groups.yahoo.com/group/kicad-users/message/15105
2013-04-25 07:25:47 -05:00
jean-pierre charras 74c64958f4 Pcbnew: fix bug in pcb_parser: incorrect pad local solder paste margin ratio value read when not 0. ( This also fixes bug 1170535 ) 2013-04-19 09:14:27 +02:00
Dick Hollenbeck d5fff4a6da revert text strings for clarity 2013-04-11 13:00:36 -05:00