b494279fe5
Move target files into separate directory.
2016-07-13 08:31:09 +12:00
b644724520
Overhaul of semihosting. Remove dependence of target on gdb_packet.
2016-07-13 08:31:09 +12:00
b03cc59bea
target: Add target controller structure for indirect calls back to host.
2016-07-13 08:31:09 +12:00
5832d8a42a
Clean up common SWD stuff.
2016-07-13 08:31:09 +12:00
9b8e2c3ad1
target: Replace all calls to gdb_out with new tc_printf.
2016-07-13 08:31:09 +12:00
5c5f76d60e
target: Remove last accesses to private structure from outside.
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Only include target_internal.h from inside target files.
2016-07-13 08:31:09 +12:00
1cd03b3fa4
Allow breakpoint and watchpoint methods to be left NULL.
2016-07-13 08:31:09 +12:00
07f27d1b70
Hide target list internals form command.c
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Remove unused support for extended target structure size.
2016-07-13 08:31:09 +12:00
72790893ae
target: move mmio routines out of public interface.
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Fix crc routine to use buffered reads on stm32.
2016-07-13 08:31:09 +12:00
e28e158721
Move *scan prototypes to target.h.
2016-07-13 08:31:09 +12:00
4e04c1dded
Split out non-public target stuff into new header.
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Wrap target methods with functions instead of macros.
2016-07-13 08:31:09 +12:00
67bd1530b7
Remove some unused includes.
2016-07-13 08:31:09 +12:00
3c44cce935
Make generic jtagtap function weak and stop including the c file.
2016-07-13 08:31:09 +12:00
0fc61efe7c
Move STM32L[01] bit definitions to their driver and remove header.
2016-07-13 08:31:09 +12:00
6b49fbe594
Quiet adiv5 probe.
2016-07-13 08:31:09 +12:00
0480578391
stlink: New discovery boards support.
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Patch from issue #103
2016-07-13 08:00:05 +12:00
fec09464ac
Add STM32F302C8 ID.
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From issue #100
2016-07-13 08:00:05 +12:00
c906a8614f
° add support for ITCM flash memory (in addition of DTCM) for STM32F7 family
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° add support for STM32F76x and STM32F77x
2016-07-11 14:58:40 +02:00
419aae4940
lpc15xx cleanup
2016-07-06 10:34:51 +12:00
4addec0a21
lpc15xx support
2016-07-05 16:53:47 -04:00
2a5efbc1ac
Merge pull request #140 from gsmcmullin/va_translation
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cortexa: Virtual address translation and memory access through APB.
2016-06-30 18:23:31 +12:00
4596d88f72
cortexa: Use fast mode for APB mem access and allow byte access.
2016-06-30 17:56:01 +12:00
d16aca9ae0
cortexa: Fall back to APB memory access if no AHB available.
2016-06-29 11:11:27 +12:00
ea9c2a2030
cortexa: Catch and report faults on address translation.
2016-06-29 11:11:27 +12:00
9e2b0a86d7
cortexa: Perform VA translation on memory access.
2016-06-29 11:11:27 +12:00
9c5ff37bf8
Add monitor command to force SRST
2016-06-28 14:35:43 +12:00
60c67ee156
cortexa: Flush I-Cache on detach.
2016-06-28 14:35:43 +12:00
6b3c3d3473
cortexa: Add timeout to reset spin.
2016-06-28 14:35:43 +12:00
8b4342394f
Overhaul of timeouts so they may be nested.
2016-06-28 14:35:43 +12:00
53c7fbd543
Fixes for verbose debug output.
2016-06-23 15:03:00 +12:00
7b2309943a
Use Product ID and Componend ID tables instead of defines.
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This patch adds tables that allow us to decode the Product ID and
Component ID registers. Based on those tables we can decide what probe
function to use. Also this makes it possible for us to understand what
ADIv5 components the target is offering to us, even if we do not
need/use them.
The tables include a comment describing how the register bits need to be
interpreted.
2016-06-22 18:34:04 -07:00
20c994eece
Added black magic verbose/debug mode switch.
2016-06-22 17:28:26 -07:00
90c0c28327
cortexa: Redirect read of PC through r0. MCR is unpredictable for r15.
2016-06-23 12:00:04 +12:00
2639bdbe23
Add NXP LPC82x support
2016-06-21 10:33:34 +02:00
9be5cdb702
BMPM V2 target power control GPIO needs to be an open drain drive.
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BMPM V2 uses a biasing resistor for the true switch mosfet circuit.
Because of that the weak pull-up/down of the stm32 is not asserting the
correct gate voltage for the mosfets to fully switch through. Because of
that we need to use open drain configulation of the GPIO instead.
2016-06-06 15:01:37 -07:00
55cea5f90a
Merge pull request #132 from dlaw/kinetis
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Add Kinetis KL27 support
2016-06-01 07:48:13 +12:00
24d973e39f
adiv5: Probe ARMv6M devices with Cortex-M driver.
2016-05-30 08:48:54 +12:00
25a46a83f9
Add Kinetis KL27 support
2016-05-18 12:06:54 -04:00
bcf5b1eaa3
Merge pull request #126 from gsmcmullin/cortexa
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Cortex-A support
2016-04-28 10:56:43 +12:00
13602c5d85
cortexa: Also assert SRST to reset.
2016-04-20 12:55:12 -07:00
08c9ab54d7
adiv5: Try abort sequence if DP is stalling during scan.
2016-04-20 12:55:12 -07:00
bed6627579
adiv5: Implement access to DP ABORT register.
2016-04-20 11:36:42 -07:00
68bf825042
cortexa: Disable interrupts while single stepping.
2016-04-20 11:35:58 -07:00
88bf92ac36
cortexa: Fix write back of PC and CPSR.
2016-04-20 11:35:25 -07:00
d94f7e0c75
Remove old arm7tdmi header.
2016-04-19 22:23:19 -07:00
0ab878dcd2
cortexa: Add short delay after reset, before reattaching.
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Allows the early bootloader to configure the DDR ram.
2016-04-19 13:29:22 -07:00
a2ec877b73
cortexa: Restore cache clean and invalidate on memory writes.
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Include a small optimisation of APB access to speed up the process.
2016-04-19 13:24:05 -07:00
49f89cfc95
cortexa: Fix detach.
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Also pulls out internal register cache functions from halt/resume.
2016-04-19 13:24:05 -07:00
f6b574e0b0
Cortex-A target support.
2016-04-19 13:24:05 -07:00
60f3be501e
Pass breakpoint length to target.
2016-04-19 13:24:05 -07:00
Gareth McMullin
Alexandre Bustico
David Lawrence
Piotr Esden-Tempski
David Brandt