Timer_B is identical to Timer_A with the following exceptions.
1. The SCCI bit function is not implemented in Timer_B.
2. The interrupt vector word of TBIFG is different than TAIFG one.
3. The length of Timer_B is programable to be 8, 10, 12, or 16 bits.
4. Timer_B TBCCRx registers can be double-buffered.
5. Timer_B TBCCRx registers can be grouped.
This change implements 1, 2, and 3.
Double-buffering and grouping TBCCRx will be following.