kicad/pcbnew/specctra_export.cpp

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/*
* This program source code file is part of KiCad, a free EDA CAD application.
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*
* Copyright (C) 2007-2008 SoftPLC Corporation, Dick Hollenbeck <dick@softplc.com>
* Copyright (C) 2007 KiCad Developers, see change_log.txt for contributors.
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*
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* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
* or you may search the http://www.gnu.org website for the version 2 license,
* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
*/
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/* This source is a complement to specctra.cpp and implements the export to
specctra dsn file format. The specification for the grammar of the specctra
dsn file used to develop this code is given here:
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http://tech.groups.yahoo.com/group/kicad-users/files/ then file "specctra.pdf"
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Also see the comments at the top of the specctra.cpp file itself.
*/
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#include "wxPcbStruct.h"
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#include "pcbstruct.h" // HISTORY_NUMBER
#include "confirm.h" // DisplayError()
#include "gestfich.h" // EDA_FileSelector()
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#include "trigo.h" // RotatePoint()
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#include <set> // std::set
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#include <map> // std::map
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#include <boost/utility.hpp> // boost::addressof()
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#include "class_board.h"
#include "class_module.h"
#include "class_edge_mod.h"
#include "class_track.h"
#include "class_zone.h"
#include "class_drawsegment.h"
#include "collectors.h"
#include "specctra.h"
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using namespace DSN;
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// Add .1 mil to the requested clearances as a safety margin.
// There has been disagreement about interpretation of clearance in the past
// between KiCad and Freerouter, so keep this safetyMargin until the
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// disagreement is resolved and stable. Freerouter seems to be moving
// (protected) traces upon loading the DSN file, and even though it seems to sometimes
// add its own 0.1 to the clearances, I believe this is happening after
// the load process (and moving traces) so I am of the opinion this is
// still needed.
static const double safetyMargin = 0.1;
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// see wxPcbStruct.h
void PCB_EDIT_FRAME::ExportToSpecctra( wxCommandEvent& event )
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{
wxString fullFileName = GetScreen()->GetFileName();
wxString path;
wxString name;
wxString ext;
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wxString dsn_ext = wxT( ".dsn" );
wxString mask = wxT( "*" ) + dsn_ext;
wxFileName::SplitPath( fullFileName, &path, &name, &ext );
name += dsn_ext;
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fullFileName = EDA_FileSelector( _( "Specctra DSN file:" ),
path,
name, // name.ext without path!
dsn_ext,
mask,
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this,
wxFD_SAVE,
false
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);
if( fullFileName == wxEmptyString )
return;
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SPECCTRA_DB db;
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bool ok = true;
wxString errorText;
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BASE_SCREEN* screen = GetScreen();
bool wasModified = screen->IsModify() && !screen->IsSave();
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db.SetPCB( SPECCTRA_DB::MakePCB() );
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SetLocaleTo_C_standard( ); // Switch the locale to standard C
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// DSN Images (=KiCad MODULES and pads) must be presented from the
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// top view. So we temporarily flip any modules which are on the back
// side of the board to the front, and record this in the MODULE's flag field.
db.FlipMODULEs( GetBoard() );
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try
{
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GetBoard()->SynchronizeNetsAndNetClasses();
db.FromBOARD( GetBoard() );
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db.ExportPCB( fullFileName, true );
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// if an exception is thrown by FromBOARD or ExportPCB(), then
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// ~SPECCTRA_DB() will close the file.
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}
catch( IO_ERROR& ioe )
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{
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ok = false;
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// copy the error string to safe place, ioe is in this scope only.
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errorText = ioe.errorText;
}
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SetLocaleTo_Default( ); // revert to the current locale
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// done assuredly, even if an exception was thrown and caught.
db.RevertMODULEs( GetBoard() );
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// The two calls below to MODULE::Flip(), both set the
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// modified flag, yet their actions cancel each other out, so it should
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// be ok to clear the modify flag.
if( !wasModified )
screen->ClrModify();
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if( ok )
{
SetStatusText( wxString( _( "BOARD exported OK." ) ) );
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}
else
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{
errorText += '\n';
errorText += _( "Unable to export, please fix and try again." );
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DisplayError( this, errorText );
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}
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}
namespace DSN {
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const KICAD_T SPECCTRA_DB::scanPADs[] = { PCB_PAD_T, EOT };
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/**
* Function scale
* converts a distance from KiCad units to our reported specctra dsn units:
* 1/10000 inches (deci-mils) to mils. So the factor of 10 comes in.
*/
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static inline double scale( int kicadDist )
{
return kicadDist/10.0;
}
static inline double mapX( int x )
{
return scale(x);
}
static inline double mapY( int y )
{
return -scale(y); // make y negative, since it is increasing going down.
}
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/**
* Function mapPt
* converts a KiCad point into a DSN file point. Kicad's BOARD coordinates
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* are in deci-mils (i.e. 1/10,000th of an inch) and we are exporting in units
* of mils, so we have to divide by 10.
*/
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static POINT mapPt( const wxPoint& pt )
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{
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POINT ret;
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ret.x = mapX( pt.x );
ret.y = mapY( pt.y );
ret.FixNegativeZero();
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return ret;
}
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/**
* Function findPoint
* searches for a DRAWSEGMENT with an end point or start point of aPoint, and
* if found, removes it from the TYPE_COLLECTOR and returns it, else returns NULL.
* @param aPoint The starting or ending point to search for.
* @param items The list to remove from.
* @return DRAWSEGMENT* - The first DRAWSEGMENT that has a start or end point matching
* aPoint, otherwise NULL if none.
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*/
static DRAWSEGMENT* findPoint( const wxPoint& aPoint, TYPE_COLLECTOR* items )
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{
for( int i=0; i<items->GetCount(); ++i )
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{
DRAWSEGMENT* graphic = (DRAWSEGMENT*) (*items)[i];
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wxASSERT( graphic->Type() == PCB_LINE_T );
if( aPoint == graphic->GetStart() || aPoint == graphic->GetEnd() )
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{
items->Remove(i);
return graphic;
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}
}
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#if defined(DEBUG)
printf("Unable to find segment matching point (%d,%d)\n",
aPoint.x, aPoint.y );
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for( int i=0; i<items->GetCount(); ++i )
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{
DRAWSEGMENT* graphic = (DRAWSEGMENT*) (*items)[i];
printf( "type=%s, GetStart()=%d,%d GetEnd()=%d,%d\n",
TO_UTF8( BOARD_ITEM::ShowShape( (Track_Shapes)graphic->m_Shape ) ),
graphic->GetStart().x,
graphic->GetStart().y,
graphic->GetEnd().x,
graphic->GetEnd().y );
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}
#endif
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return NULL;
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}
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/**
* Function isRoundKeepout
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* decides if the pad is a copper-less through hole which needs to be made into
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* a round keepout.
*/
static bool isRoundKeepout( D_PAD* aPad )
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{
if( aPad->m_PadShape==PAD_CIRCLE )
{
if( aPad->m_Drill.x >= aPad->m_Size.x )
return true;
if( (aPad->m_layerMask & ALL_CU_LAYERS) == 0 )
return true;
}
return false;
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}
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/**
* Function makePath
* creates a PATH element with a single straight line, a pair of vertices.
*/
static PATH* makePath( const POINT& aStart, const POINT& aEnd, const std::string& aLayerName )
{
PATH* path = new PATH( 0, T_path );
path->AppendPoint( aStart );
path->AppendPoint( aEnd );
path->SetLayerId( aLayerName.c_str() );
return path;
}
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PADSTACK* SPECCTRA_DB::makePADSTACK( BOARD* aBoard, D_PAD* aPad )
{
char name[256]; // padstack name builder
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std::string uniqifier;
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// caller must do these checks before calling here.
wxASSERT( !isRoundKeepout( aPad ) );
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PADSTACK* padstack = new PADSTACK();
int reportedLayers = 0; // how many in reported padstack
const char* layerName[NB_COPPER_LAYERS];
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uniqifier = '[';
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bool onAllCopperLayers = ( (aPad->m_layerMask & ALL_CU_LAYERS) == ALL_CU_LAYERS );
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if( onAllCopperLayers )
uniqifier += 'A'; // A for all layers
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const int copperCount = aBoard->GetCopperLayerCount();
for( int layer=0; layer<copperCount; ++layer )
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{
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int kilayer = pcbLayer2kicad[layer];
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if( onAllCopperLayers || aPad->IsOnLayer( kilayer ) )
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{
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layerName[reportedLayers++] = layerIds[layer].c_str();
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if( !onAllCopperLayers )
{
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if( layer == 0 )
uniqifier += 'T';
else if( layer == copperCount-1 )
uniqifier += 'B';
else
uniqifier += char('0' + layer); // layer index char
}
}
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}
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uniqifier += ']';
POINT dsnOffset;
if( aPad->m_Offset.x || aPad->m_Offset.y )
{
char offsetTxt[64];
wxPoint offset( aPad->m_Offset.x, aPad->m_Offset.y );
dsnOffset = mapPt( offset );
// using '(' or ')' would cause padstack name to be quote wrapped,
// so use other brackets, and {} locks freerouter.
sprintf( offsetTxt, "[%.6g,%.6g]", dsnOffset.x, dsnOffset.y );
uniqifier += offsetTxt;
}
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switch( aPad->m_PadShape )
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{
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default:
case PAD_CIRCLE:
{
double diameter = scale(aPad->m_Size.x);
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for( int ndx=0; ndx<reportedLayers; ++ndx )
{
SHAPE* shape = new SHAPE( padstack );
padstack->Append( shape );
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CIRCLE* circle = new CIRCLE( shape );
shape->SetShape( circle );
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circle->SetLayerId( layerName[ndx] );
circle->SetDiameter( diameter );
circle->SetVertex( dsnOffset );
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}
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snprintf( name, sizeof(name), "Round%sPad_%.6g_mil",
uniqifier.c_str(), scale(aPad->m_Size.x) );
name[ sizeof(name)-1 ] = 0;
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padstack->SetPadstackId( name );
}
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break;
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case PAD_RECT:
{
double dx = scale( aPad->m_Size.x ) / 2.0;
double dy = scale( aPad->m_Size.y ) / 2.0;
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POINT lowerLeft( -dx, -dy );
POINT upperRight( dx, dy );
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lowerLeft += dsnOffset;
upperRight += dsnOffset;
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for( int ndx=0; ndx<reportedLayers; ++ndx )
{
SHAPE* shape = new SHAPE( padstack );
padstack->Append( shape );
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RECTANGLE* rect = new RECTANGLE( shape );
shape->SetShape( rect );
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rect->SetLayerId( layerName[ndx] );
rect->SetCorners( lowerLeft, upperRight );
}
snprintf( name, sizeof(name), "Rect%sPad_%.6gx%.6g_mil",
uniqifier.c_str(), scale(aPad->m_Size.x), scale(aPad->m_Size.y) );
name[ sizeof(name)-1 ] = 0;
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padstack->SetPadstackId( name );
}
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break;
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case PAD_OVAL:
{
double dx = scale( aPad->m_Size.x ) / 2.0;
double dy = scale( aPad->m_Size.y ) / 2.0;
double dr = dx - dy;
double radius;
POINT start;
POINT stop;
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if( dr >= 0 ) // oval is horizontal
{
radius = dy;
start = POINT( -dr, 0.0 );
stop = POINT( dr, 0.0 );
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}
else // oval is vertical
{
radius = dx;
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dr = -dr;
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start = POINT( 0.0, -dr );
stop = POINT( 0.0, dr );
}
start += dsnOffset;
stop += dsnOffset;
for( int ndx=0; ndx<reportedLayers; ++ndx )
{
SHAPE* shape;
PATH* path;
// see http://www.freerouting.net/usren/viewtopic.php?f=3&t=317#p408
shape = new SHAPE( padstack );
padstack->Append( shape );
path = makePath( start, stop, layerName[ndx] );
shape->SetShape( path );
path->aperture_width = 2.0 * radius;
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}
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snprintf( name, sizeof(name), "Oval%sPad_%.6gx%.6g_mil",
uniqifier.c_str(), scale(aPad->m_Size.x), scale(aPad->m_Size.y) );
name[ sizeof(name)-1 ] = 0;
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padstack->SetPadstackId( name );
}
break;
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case PAD_TRAPEZOID:
{
double dx = scale( aPad->m_Size.x ) / 2.0;
double dy = scale( aPad->m_Size.y ) / 2.0;
double ddx = scale( aPad->m_DeltaSize.x ) / 2.0;
double ddy = scale( aPad->m_DeltaSize.y ) / 2.0;
// see class_pad_draw_functions.cpp which draws the trapezoid pad
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POINT lowerLeft( -dx - ddy, -dy - ddx );
POINT upperLeft( -dx + ddy, +dy + ddx );
POINT upperRight( +dx - ddy, +dy - ddx );
POINT lowerRight( +dx + ddy, -dy + ddx );
lowerLeft += dsnOffset;
upperLeft += dsnOffset;
upperRight += dsnOffset;
lowerRight += dsnOffset;
for( int ndx=0; ndx<reportedLayers; ++ndx )
{
SHAPE* shape = new SHAPE( padstack );
padstack->Append( shape );
// a T_polygon exists as a PATH
PATH* polygon = new PATH( shape, T_polygon );
shape->SetShape( polygon );
polygon->SetLayerId( layerName[ndx] );
polygon->AppendPoint( lowerLeft );
polygon->AppendPoint( upperLeft );
polygon->AppendPoint( upperRight );
polygon->AppendPoint( lowerRight );
}
D(printf( "m_DeltaSize: %d,%d\n", aPad->m_DeltaSize.x, aPad->m_DeltaSize.y );)
// this string _must_ be unique for a given physical shape
snprintf( name, sizeof(name), "Trapz%sPad_%.6gx%.6g_%c%.6gx%c%.6g_mil",
uniqifier.c_str(), scale(aPad->m_Size.x), scale(aPad->m_Size.y),
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aPad->m_DeltaSize.x < 0 ? 'n' : 'p',
abs( scale( aPad->m_DeltaSize.x )),
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aPad->m_DeltaSize.y < 0 ? 'n' : 'p',
abs( scale( aPad->m_DeltaSize.y ))
);
name[ sizeof(name)-1 ] = 0;
padstack->SetPadstackId( name );
}
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break;
}
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return padstack;
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}
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/// data type used to ensure unique-ness of pin names, holding (wxString and int)
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//typedef std::map<wxString, int, wxString_less_than> PINMAP;
typedef std::map<wxString, int> PINMAP;
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IMAGE* SPECCTRA_DB::makeIMAGE( BOARD* aBoard, MODULE* aModule )
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{
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PINMAP pinmap;
TYPE_COLLECTOR moduleItems;
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wxString padName;
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// get all the MODULE's pads.
moduleItems.Collect( aModule, scanPADs );
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IMAGE* image = new IMAGE(0);
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image->image_id = TO_UTF8( aModule->m_LibRef );
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// from the pads, and make an IMAGE using collated padstacks.
for( int p=0; p<moduleItems.GetCount(); ++p )
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{
D_PAD* pad = (D_PAD*) moduleItems[p];
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// see if this pad is a through hole with no copper on its perimeter
if( isRoundKeepout( pad ) )
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{
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double diameter = scale( pad->m_Drill.x );
POINT vertex = mapPt( pad->m_Pos0 );
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int layerCount = aBoard->GetCopperLayerCount();
for( int layer=0; layer<layerCount; ++layer )
{
KEEPOUT* keepout = new KEEPOUT(image, T_keepout);
image->keepouts.push_back( keepout );
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CIRCLE* circle = new CIRCLE( keepout );
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keepout->SetShape( circle );
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circle->SetDiameter( diameter );
circle->SetVertex( vertex );
circle->SetLayerId( layerIds[layer].c_str() );
}
}
// else if() could there be a square keepout here?
2008-02-14 01:07:52 +00:00
else
2008-02-08 15:00:50 +00:00
{
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PADSTACK* padstack = makePADSTACK( aBoard, pad );
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2008-02-14 01:07:52 +00:00
PADSTACKSET::iterator iter = padstackset.find( *padstack );
if( iter != padstackset.end() )
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{
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// padstack is a duplicate, delete it and use the original
delete padstack;
padstack = (PADSTACK*) *iter.base(); // folklore, be careful here
2008-02-08 15:00:50 +00:00
}
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else
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{
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padstackset.insert( padstack );
2008-02-08 15:00:50 +00:00
}
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2008-02-14 01:07:52 +00:00
PIN* pin = new PIN(image);
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2008-02-14 01:07:52 +00:00
padName = pad->ReturnStringPadName();
pin->pin_id = TO_UTF8( padName );
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if( padName!=wxEmptyString && pinmap.find( padName )==pinmap.end() )
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{
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pinmap[ padName ] = 0;
}
else // pad name is a duplicate within this module
2008-02-14 01:07:52 +00:00
{
char buf[32];
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2008-02-14 01:07:52 +00:00
int duplicates = ++pinmap[ padName ];
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2008-02-14 01:07:52 +00:00
sprintf( buf, "@%d", duplicates );
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pin->pin_id += buf; // append "@1" or "@2", etc. to pin name
}
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2008-02-14 01:07:52 +00:00
pin->kiNetCode = pad->GetNet();
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2008-02-14 01:07:52 +00:00
image->pins.push_back( pin );
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pin->padstack_id = padstack->padstack_id;
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int angle = pad->m_Orient - aModule->m_Orient; // tenths of degrees
if( angle )
{
NORMALIZE_ANGLE_POS(angle);
pin->SetRotation( angle / 10.0 );
}
2008-02-07 20:23:58 +00:00
wxPoint pos( pad->m_Pos0 );
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2008-02-14 01:07:52 +00:00
pin->SetVertex( mapPt( pos ) );
}
}
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2008-03-01 13:15:41 +00:00
#if 1 // enable image (outline) scopes.
static const KICAD_T scanEDGEs[] = { PCB_MODULE_EDGE_T, EOT };
// get all the MODULE's EDGE_MODULEs and convert those to DSN outlines.
moduleItems.Collect( aModule, scanEDGEs );
for( int i=0; i<moduleItems.GetCount(); ++i )
{
EDGE_MODULE* graphic = (EDGE_MODULE*) moduleItems[i];
SHAPE* outline;
PATH* path;
switch( graphic->m_Shape )
{
case S_SEGMENT:
outline = new SHAPE( image, T_outline );
image->Append( outline );
path = new PATH( outline );
outline->SetShape( path );
path->SetAperture( scale( graphic->m_Width ) );
path->SetLayerId( "signal" );
path->AppendPoint( mapPt( graphic->m_Start0 ) );
path->AppendPoint( mapPt( graphic->m_End0 ) );
break;
case S_CIRCLE:
{
// this is best done by 4 QARC's but freerouter does not yet support QARCs.
// for now, support by using line segments.
outline = new SHAPE( image, T_outline );
image->Append( outline );
path = new PATH( outline );
outline->SetShape( path );
path->SetAperture( scale( graphic->m_Width ) );
path->SetLayerId( "signal" );
// Do the math using KiCad units, that way we stay out of the
2008-02-29 06:49:34 +00:00
// scientific notation range of floating point numbers in the
// DSN file. We do not parse scientific notation in our own
// lexer/beautifier, and the spec is not clear that this is
// required. Fixed point floats are all that should be needed.
2008-02-29 06:49:34 +00:00
double radius = hypot( double( graphic->m_Start.x - graphic->m_End.x ),
double( graphic->m_Start.y - graphic->m_End.y ) );
// better if evenly divisible into 360
const int DEGREE_INTERVAL = 18; // 18 means 20 line segments
for( double radians = 0.0; radians < 2*M_PI; radians += DEGREE_INTERVAL * M_PI / 180.0 )
{
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wxPoint point( int( radius * cos( radians ) ),
int( radius * sin( radians ) ) );
point += graphic->m_Start0; // an offset
path->AppendPoint( mapPt(point) );
}
}
break;
case S_RECT:
case S_ARC:
default:
D( printf("makeIMAGE(): unsupported shape %s\n",
TO_UTF8( BOARD_ITEM::ShowShape( (Track_Shapes)graphic->m_Shape)) );)
continue;
}
}
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#endif
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return image;
}
2008-02-07 20:23:58 +00:00
2008-01-25 22:03:36 +00:00
2008-02-14 01:07:52 +00:00
PADSTACK* SPECCTRA_DB::makeVia( int aCopperDiameter, int aDrillDiameter,
int aTopLayer, int aBotLayer )
{
char name[48];
PADSTACK* padstack = new PADSTACK();
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double dsnDiameter = scale( aCopperDiameter );
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for( int layer=aTopLayer; layer<=aBotLayer; ++layer )
{
SHAPE* shape = new SHAPE( padstack );
padstack->Append( shape );
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CIRCLE* circle = new CIRCLE( shape );
shape->SetShape( circle );
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circle->SetDiameter( dsnDiameter );
circle->SetLayerId( layerIds[layer].c_str() );
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}
2008-01-26 02:02:27 +00:00
2008-02-14 01:07:52 +00:00
snprintf( name, sizeof(name), "Via[%d-%d]_%.6g:%.6g_mil",
aTopLayer, aBotLayer, dsnDiameter,
// encode the drill value into the name for later import
scale( aDrillDiameter )
);
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name[ sizeof(name)-1 ] = 0;
padstack->SetPadstackId( name );
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return padstack;
}
2008-01-29 16:45:14 +00:00
2008-02-07 20:23:58 +00:00
2008-02-14 01:07:52 +00:00
PADSTACK* SPECCTRA_DB::makeVia( const SEGVIA* aVia )
{
int topLayer;
int botLayer;
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2008-02-14 01:07:52 +00:00
aVia->ReturnLayerPair( &topLayer, &botLayer );
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2008-02-14 01:07:52 +00:00
topLayer = kicadLayer2pcb[topLayer];
botLayer = kicadLayer2pcb[botLayer];
2008-02-07 20:23:58 +00:00
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if( topLayer > botLayer )
EXCHG( topLayer, botLayer );
return makeVia( aVia->m_Width, aVia->GetDrillValue(), topLayer, botLayer );
2008-01-21 22:16:45 +00:00
}
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void SPECCTRA_DB::fillBOUNDARY( BOARD* aBoard, BOUNDARY* boundary ) throw( IO_ERROR )
{
TYPE_COLLECTOR items;
// get all the DRAWSEGMENTS into 'items', then look for layer == EDGE_N,
// and those segments comprise the board's perimeter.
static const KICAD_T scanDRAWSEGMENTS[] = { PCB_LINE_T, EOT };
items.Collect( aBoard, scanDRAWSEGMENTS );
bool haveEdges = false;
for( int i=0; i<items.GetCount(); )
{
DRAWSEGMENT* item = (DRAWSEGMENT*) items[i];
wxASSERT( item->Type() == PCB_LINE_T );
if( item->GetLayer() != EDGE_N )
{
items.Remove( i );
}
else
{
haveEdges = true;
++i;
D( item->Show( 0, std::cout );)
}
}
if( haveEdges )
{
PATH* path = new PATH( boundary );
boundary->paths.push_back( path );
path->layer_id = "pcb";
wxPoint prevPt;
DRAWSEGMENT* graphic = (DRAWSEGMENT*) items[0];
// the first DRAWSEGMENT is in 'graphic*', ok to remove it from 'items'
items.Remove( 0 );
prevPt = graphic->GetEnd();
path->AppendPoint( mapPt( prevPt ) );
// do not append the other end point yet, this first 'graphic' might be an arc
for(;;)
{
switch( graphic->m_Shape )
{
case S_SEGMENT:
{
wxPoint nextPt;
if( prevPt != graphic->GetStart() )
{
wxASSERT( prevPt == graphic->GetEnd() );
nextPt = graphic->GetStart();
}
else
{
wxASSERT( prevPt == graphic->GetStart() );
nextPt = graphic->GetEnd();
}
path->AppendPoint( mapPt(nextPt) );
prevPt = nextPt;
}
break;
case S_ARC:
// freerouter does not yet understand arcs, so approximate
// an arc with a series of short lines and put those
// line segments into the !same! PATH.
{
const int STEPS = 9; // in an arc of 90 degrees
wxPoint start = graphic->GetStart();
wxPoint end = graphic->GetEnd();
wxPoint center = graphic->m_Start;
int angle = -graphic->m_Angle;
if( prevPt != start )
{
wxASSERT( prevPt == graphic->GetEnd() );
angle = -angle;
EXCHG( start, end );
}
wxPoint nextPt;
for( int step=1; step<=STEPS; ++step )
{
int rotation = ( angle * step )/STEPS;
nextPt = start;
RotatePoint( &nextPt.x, &nextPt.y, center.x, center.y, rotation );
path->AppendPoint( mapPt( nextPt ) );
}
prevPt = nextPt;
}
break;
case S_CIRCLE:
#if 0
// do not output a circle, freerouter does not understand it.
// this might be a mounting hole or something, ignore it without error
// because some of our demo boards have used the edges pcb layer to
// hold islanded circles, rather than simply using holes.
break;
#else
// Do not output a circle, freerouter does not understand it.
// tell user his board has a problem, this is better than silently
// ignoring the error. "edges pcb" layer should not be used
// to hold islanded circles which could or should be better done
// as simple holes. (Some of our demo boards have this problem.)
// fall thru here to report the error.
#endif
default:
{
wxString error;
error.Printf( _("Unsupported DRAWSEGMENT type %s"),
GetChars( BOARD_ITEM::ShowShape( (Track_Shapes) graphic->m_Shape ) ) );
ThrowIOError( error );
}
break;
}
if( items.GetCount() == 0 )
break;
graphic = findPoint( prevPt, &items );
if( !graphic )
{
wxString error;
error << _("Unable to find the next segment with an endpoint of ");
error << prevPt;
error << wxChar('\n');
error << _("Edit Edges_Pcb segments, making them contiguous.");
ThrowIOError( error );
}
}
#if 0 && defined(DEBUG)
STRING_FORMATTER sf;
path->Format( &sf, 0 );
printf( "%s\n", sf.GetString().c_str() );
#endif
}
else
{
aBoard->ComputeBoundingBox();
RECTANGLE* rect = new RECTANGLE( boundary );
2008-05-05 20:13:54 +00:00
boundary->rectangle = rect;
rect->layer_id = "pcb";
// opposite corners
wxPoint bottomRight;
bottomRight.x = aBoard->m_BoundaryBox.GetRight();
bottomRight.y = aBoard->m_BoundaryBox.GetBottom();
rect->SetCorners( mapPt( aBoard->m_BoundaryBox.GetOrigin() ),
mapPt( bottomRight ) );
}
}
2008-02-29 06:49:34 +00:00
typedef std::set<std::string> STRINGSET;
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typedef std::pair<STRINGSET::iterator, bool> STRINGSET_PAIR;
void SPECCTRA_DB::FromBOARD( BOARD* aBoard ) throw( IO_ERROR )
2008-01-22 20:48:02 +00:00
{
TYPE_COLLECTOR items;
static const KICAD_T scanMODULEs[] = { PCB_MODULE_T, EOT };
2008-02-07 20:23:58 +00:00
2008-02-09 08:34:45 +00:00
// Not all boards are exportable. Check that all reference Ids are unique.
// Unless they are unique, we cannot import the session file which comes
2008-05-06 12:32:41 +00:00
// back to us later from the router.
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{
2008-02-14 01:07:52 +00:00
TYPE_COLLECTOR padItems;
2008-02-09 08:34:45 +00:00
2008-02-14 01:07:52 +00:00
items.Collect( aBoard, scanMODULEs );
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2008-02-14 01:07:52 +00:00
STRINGSET refs; // holds module reference designators
2008-02-09 08:34:45 +00:00
for( int i=0; i<items.GetCount(); ++i )
{
MODULE* module = (MODULE*) items[i];
if( module->GetReference() == wxEmptyString )
{
ThrowIOError( _("Component with value of \"%s\" has empty reference id."),
GetChars( module->GetValue() ) );
2008-02-09 08:34:45 +00:00
}
// if we cannot insert OK, that means the reference has been seen before.
STRINGSET_PAIR refpair = refs.insert( TO_UTF8( module->GetReference() ) );
2008-02-14 01:07:52 +00:00
if( !refpair.second ) // insert failed
2008-02-09 08:34:45 +00:00
{
ThrowIOError( _("Multiple components have identical reference IDs of \"%s\"."),
GetChars( module->GetReference() ) );
2008-02-09 08:34:45 +00:00
}
}
}
2008-02-07 20:23:58 +00:00
2008-01-22 20:48:02 +00:00
if( !pcb )
pcb = SPECCTRA_DB::MakePCB();
2008-01-31 01:30:52 +00:00
//-----<layer_descriptor>-----------------------------------------------
{
2008-02-07 20:23:58 +00:00
// specctra wants top physical layer first, then going down to the
2008-01-31 01:30:52 +00:00
// bottom most physical layer in physical sequence.
// @question : why does KiCad not display layers in that order?
2008-01-31 06:46:31 +00:00
buildLayerMaps( aBoard );
2008-02-07 20:23:58 +00:00
int layerCount = aBoard->GetCopperLayerCount();
2008-01-31 01:30:52 +00:00
for( int pcbNdx=0; pcbNdx<layerCount; ++pcbNdx )
{
2008-01-31 01:30:52 +00:00
LAYER* layer = new LAYER( pcb->structure );
pcb->structure->layers.push_back( layer );
2008-02-07 20:23:58 +00:00
layer->name = layerIds[pcbNdx];
2008-02-07 20:23:58 +00:00
2008-03-04 04:22:27 +00:00
DSN_T layerType;
switch( aBoard->GetLayerType( pcbLayer2kicad[pcbNdx] ) )
{
default:
case LT_SIGNAL: layerType = T_signal; break;
case LT_POWER: layerType = T_power; break;
case LT_MIXED: layerType = T_mixed; break;
2008-03-04 21:39:46 +00:00
case LT_JUMPER: layerType = T_jumper; break;
2008-03-04 04:22:27 +00:00
}
layer->layer_type = layerType;
2008-02-05 02:13:16 +00:00
layer->properties.push_back( PROPERTY() );
PROPERTY* property = &layer->properties.back();
property->name = "index";
char temp[32];
sprintf( temp, "%d", pcbNdx );
2008-02-07 20:23:58 +00:00
property->value = temp;
2008-01-31 01:30:52 +00:00
}
}
// a space in a quoted token is NOT a terminator, true establishes this.
pcb->parser->space_in_quoted_tokens = true;
2008-02-07 20:23:58 +00:00
2008-01-23 01:52:49 +00:00
//-----<unit_descriptor> & <resolution_descriptor>--------------------
2008-02-07 20:23:58 +00:00
{
2008-01-23 01:52:49 +00:00
pcb->unit->units = T_mil;
pcb->resolution->units = T_mil;
// Kicad only supports 1/10th of mil internal coordinates. So to avoid
// having the router give us back 1/100th of mil coordinates which we
// will have to round and thereby cause error, we declare our maximum
// resolution precisely at 1/10th for now. For more on this, see:
// http://www.freerouting.net/usren/viewtopic.php?f=3&t=354
pcb->resolution->value = 10;
2008-01-23 01:52:49 +00:00
}
2008-01-22 20:48:02 +00:00
2008-02-07 20:23:58 +00:00
2008-01-23 01:52:49 +00:00
//-----<boundary_descriptor>------------------------------------------
2008-01-22 20:48:02 +00:00
{
// Because fillBOUNDARY() can throw an exception, we link in an
// empty boundary so the BOUNDARY does not get lost in the event of
// of an exception.
BOUNDARY* boundary = new BOUNDARY(0);
pcb->structure->SetBOUNDARY( boundary );
fillBOUNDARY( aBoard, boundary );
2008-01-22 20:48:02 +00:00
}
2008-02-07 20:23:58 +00:00
2008-01-31 06:46:31 +00:00
//-----<rules>--------------------------------------------------------
{
2008-02-09 08:34:45 +00:00
char rule[80];
2008-02-07 20:23:58 +00:00
2009-09-10 15:22:26 +00:00
int defaultTrackWidth = aBoard->m_NetClasses.GetDefault()->GetTrackWidth();
int defaultClearance = aBoard->m_NetClasses.GetDefault()->GetClearance();
2008-10-23 21:06:43 +00:00
2009-09-10 15:22:26 +00:00
double clearance = scale( defaultClearance );
2008-02-09 16:33:03 +00:00
2008-01-31 06:46:31 +00:00
STRINGS& rules = pcb->structure->rules->rules;
2008-02-07 20:23:58 +00:00
2009-09-10 15:22:26 +00:00
sprintf( rule, "(width %.6g)", scale( defaultTrackWidth ) );
2008-01-31 06:46:31 +00:00
rules.push_back( rule );
2008-02-07 20:23:58 +00:00
2008-10-23 21:06:43 +00:00
sprintf( rule, "(clearance %.6g)", clearance+safetyMargin );
rules.push_back( rule );
// On a high density board (a board with 4 mil tracks, 4 mil spacing)
// a typical solder mask clearance will be 2-3 mils.
// This exposes 2 to 3 mils of bare board around each pad, and would
// leave only 1 to 2 mils of solder mask between the solder mask's boundary
// to the edge of any trace within "clearance" of the pad. So we need at least
// 2 mils *extra* clearance for traces which would come near a pad on
2008-10-23 21:06:43 +00:00
// a different net. So if the baseline trace to trace clearance was say 4 mils, then
// the SMD to trace clearance should be at least 6 mils.
double default_smd = clearance + safetyMargin;
if( default_smd <= 6.0 )
default_smd = 6.0;
sprintf( rule, "(clearance %.6g (type default_smd))", default_smd );
2008-01-31 06:46:31 +00:00
rules.push_back( rule );
2008-02-07 20:23:58 +00:00
2008-03-31 13:45:36 +00:00
/* see: http://www.freerouting.net/usren/viewtopic.php?f=5&t=339#p474
2008-10-23 21:06:43 +00:00
sprintf( rule, "(clearance %.6g (type pad_to_turn_gap))", clearance + safetyMargin );
2008-01-31 06:46:31 +00:00
rules.push_back( rule );
2008-02-07 20:23:58 +00:00
2008-10-23 21:06:43 +00:00
sprintf( rule, "(clearance %.6g (type smd_to_turn_gap))", clearance + safetyMargin );
2008-01-31 06:46:31 +00:00
rules.push_back( rule );
2008-02-07 20:23:58 +00:00
2008-10-23 21:06:43 +00:00
sprintf( rule, "(clearance %.6g (type via_via))", clearance + safetyMargin );
2008-01-31 06:46:31 +00:00
rules.push_back( rule );
2008-02-07 20:23:58 +00:00
2008-10-23 21:06:43 +00:00
sprintf( rule, "(clearance %.6g (type via_smd))", clearance + safetyMargin );
2008-01-31 06:46:31 +00:00
rules.push_back( rule );
2008-02-07 20:23:58 +00:00
2008-10-23 21:06:43 +00:00
sprintf( rule, "(clearance %.6g (type via_pin))", clearance + safetyMargin );
2008-01-31 06:46:31 +00:00
rules.push_back( rule );
2008-02-07 20:23:58 +00:00
2008-10-23 21:06:43 +00:00
sprintf( rule, "(clearance %.6g (type pin_pin))", clearance + safetyMargin );
2008-01-31 06:46:31 +00:00
rules.push_back( rule );
2008-02-07 20:23:58 +00:00
2008-10-23 21:06:43 +00:00
sprintf( rule, "(clearance %.6g (type smd_pin))", clearance + safetyMargin );
2008-01-31 06:46:31 +00:00
rules.push_back( rule );
2008-03-31 13:45:36 +00:00
*/
2008-02-07 20:23:58 +00:00
2008-02-09 16:33:03 +00:00
// well, the user is going to text edit these in the DSN file anyway,
// at least until we have an export dialog.
2008-10-23 21:06:43 +00:00
// Pad to pad spacing on a single SMT part can be closer than our
// clearance, we don't want freerouter complaining about that, so
// output a significantly smaller pad to pad clearance to freerouter.
2009-09-10 15:22:26 +00:00
clearance = scale( defaultClearance )/4;
2008-02-09 16:33:03 +00:00
sprintf( rule, "(clearance %.6g (type smd_smd))", clearance );
2008-01-31 06:46:31 +00:00
rules.push_back( rule );
}
2008-02-07 20:23:58 +00:00
2008-01-31 06:46:31 +00:00
//-----<zone containers become planes>--------------------------------
2008-01-23 22:36:37 +00:00
{
int netlessZones = 0;
static const KICAD_T scanZONEs[] = { PCB_ZONE_AREA_T, EOT };
2008-01-23 22:36:37 +00:00
items.Collect( aBoard, scanZONEs );
for( int i=0; i<items.GetCount(); ++i )
{
ZONE_CONTAINER* item = (ZONE_CONTAINER*) items[i];
COPPER_PLANE* plane = new COPPER_PLANE( pcb->structure );
2008-05-22 15:55:24 +00:00
pcb->structure->planes.push_back( plane );
2009-02-06 14:23:56 +00:00
PATH* mainPolygon = new PATH( plane, T_polygon );
plane->SetShape( mainPolygon );
2008-02-07 20:23:58 +00:00
plane->name = TO_UTF8( item->m_Netname );
2008-01-31 01:30:52 +00:00
if( plane->name.size() == 0 )
{
char name[32];
// This is one of those no connection zones, netcode=0, and it has no name.
// Create a unique, bogus netname.
NET* no_net = new NET( pcb->network );
sprintf( name, "@:no_net_%d", netlessZones++ );
no_net->net_id = name;
// add the bogus net name to network->nets.
pcb->network->nets.push_back( no_net );
// use the bogus net name in the netless zone.
plane->name = no_net->net_id;
}
2009-02-06 14:23:56 +00:00
mainPolygon->layer_id = layerIds[ kicadLayer2pcb[ item->GetLayer() ] ];
2008-02-07 20:23:58 +00:00
2008-01-23 22:36:37 +00:00
int count = item->m_Poly->corner.size();
2009-02-06 14:23:56 +00:00
int ndx = 0; // used in 2 for() loops below
for( ; ndx<count; ++ndx )
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{
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wxPoint point( item->m_Poly->corner[ndx].x,
item->m_Poly->corner[ndx].y );
mainPolygon->AppendPoint( mapPt(point) );
// this was the end of the main polygon
if( item->m_Poly->corner[ndx].end_contour )
break;
}
WINDOW* window = 0;
PATH* cutout = 0;
// handle the cutouts
for( ++ndx; ndx<count; ++ndx )
{
if( item->m_Poly->corner[ndx-1].end_contour )
{
window = new WINDOW( plane );
plane->AddWindow( window );
cutout = new PATH( window, T_polygon );
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window->SetShape( cutout );
cutout->layer_id = layerIds[ kicadLayer2pcb[ item->GetLayer() ] ];
}
wxASSERT( window );
wxASSERT( cutout );
wxPoint point(item->m_Poly->corner[ndx].x,
item->m_Poly->corner[ndx].y );
cutout->AppendPoint( mapPt(point) );
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}
}
}
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// keepouts could go here, there are none in Kicad at this time.
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//-----<build the images, components, and netlist>-----------------------
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{
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PIN_REF empty( pcb->network );
std::string componentId;
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// find the highest numbered netCode within the board.
int highestNetCode = aBoard->m_NetInfo->GetCount() - 1;
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deleteNETs();
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// expand the net vector to highestNetCode+1, setting empty to NULL
nets.resize( highestNetCode+1, NULL );
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// skip netcode = 0
for( unsigned i=1; i<nets.size(); ++i )
nets[i] = new NET( pcb->network );
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for( unsigned ii = 0; ii < aBoard->m_NetInfo->GetCount(); ii++ )
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{
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NETINFO_ITEM* net = aBoard->m_NetInfo->GetNetItem(ii);
int netcode = net->GetNet();
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if( netcode > 0 )
nets[ netcode ]->net_id = TO_UTF8( net->GetNetname() );
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}
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items.Collect( aBoard, scanMODULEs );
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padstackset.clear();
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for( int m=0; m<items.GetCount(); ++m )
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{
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MODULE* module = (MODULE*) items[m];
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IMAGE* image = makeIMAGE( aBoard, module );
componentId = TO_UTF8( module->GetReference() );
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// create a net list entry for all the actual pins in the image
// for the current module. location of this code is critical
// because we fabricated some pin names to ensure unique-ness
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// of pin names within a module, do not move this code because
// the life of this 'IMAGE* image' is not necessarily long. The
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// exported netlist will have some fabricated pin names in it.
// If you don't like fabricated pin names, then make sure all pads
// within your MODULEs are uniquely named!
for( unsigned p=0; p<image->pins.size(); ++p )
{
PIN* pin = &image->pins[p];
int netcode = pin->kiNetCode;
if( netcode > 0 )
{
NET* net = nets[netcode];
net->pins.push_back( empty );
PIN_REF& pin_ref = net->pins.back();
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pin_ref.component_id = componentId;
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pin_ref.pin_id = pin->pin_id;
}
}
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IMAGE* registered = pcb->library->LookupIMAGE( image );
if( registered != image )
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{
// If our new 'image' is not a unique IMAGE, delete it.
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// and use the registered one, known as 'image' after this.
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delete image;
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image = registered;
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}
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COMPONENT* comp = pcb->placement->LookupCOMPONENT( image->GetImageId() );
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PLACE* place = new PLACE( comp );
comp->places.push_back( place );
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place->SetRotation( module->m_Orient/10.0 );
place->SetVertex( mapPt( module->m_Pos ) );
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place->component_id = componentId;
place->part_number = TO_UTF8( module->GetValue() );
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// module is flipped from bottom side, set side to T_back
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if( module->flag )
{
int angle = 1800 - module->m_Orient;
NORMALIZE_ANGLE_POS(angle);
place->SetRotation( angle/10.0 );
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place->side = T_back;
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}
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}
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// copy the SPECCTRA_DB::padstackset to the LIBRARY. Since we are
// removing, do not increment the iterator
for( PADSTACKSET::iterator i=padstackset.begin(); i!=padstackset.end();
i=padstackset.begin() )
{
PADSTACKSET::auto_type ps = padstackset.release( i );
PADSTACK* padstack = ps.release();
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pcb->library->AddPadstack( padstack );
}
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// copy our SPECCTRA_DB::nets to the pcb->network
for( unsigned n=1; n<nets.size(); ++n )
{
NET* net = nets[n];
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if( net->pins.size() )
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{
// give ownership to pcb->network
pcb->network->nets.push_back( net );
nets[n] = 0;
}
}
}
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//-----< output vias used in netclasses and as stock >---------------------
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{
NETCLASSES& nclasses = aBoard->m_NetClasses;
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// Add the via from the Default netclass first. The via container
// in pcb->library preserves the sequence of addition.
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NETCLASS* netclass = nclasses.GetDefault();
PADSTACK* via = makeVia( netclass->GetViaDiameter(), netclass->GetViaDrill(),
0, aBoard->GetCopperLayerCount()-1 );
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// we AppendVia() this first one, there is no way it can be a duplicate,
// the pcb->library via container is empty at this point. After this,
// we'll have to use LookupVia().
wxASSERT( pcb->library->vias.size() == 0 );
pcb->library->AppendVia( via );
// output the stock vias, but preserve uniqueness in the via container by
// using LookupVia().
for( unsigned i=0; i < aBoard->m_ViasDimensionsList.size(); ++i )
{
int viaSize = aBoard->m_ViasDimensionsList[i].m_Diameter;
int viaDrill = aBoard->m_ViasDimensionsList[i].m_Drill;
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via = makeVia( viaSize, viaDrill,
0, aBoard->GetCopperLayerCount()-1 );
// maybe add 'via' to the library, but only if unique.
PADSTACK* registered = pcb->library->LookupVia( via );
if( registered != via )
delete via;
}
// set the "spare via" index at the start of the
// pcb->library->spareViaIndex = pcb->library->vias.size();
// output the non-Default netclass vias
for( NETCLASSES::iterator nc = nclasses.begin(); nc != nclasses.end(); ++nc )
{
netclass = nc->second;
via = makeVia( netclass->GetViaDiameter(), netclass->GetViaDrill(),
0, aBoard->GetCopperLayerCount()-1 );
// maybe add 'via' to the library, but only if unique.
PADSTACK* registered = pcb->library->LookupVia( via );
if( registered != via )
delete via;
}
}
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#if 1 // do existing wires and vias
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//-----<create the wires from tracks>-----------------------------------
{
// export all of them for now, later we'll decide what controls we need
// on this.
static const KICAD_T scanTRACKs[] = { PCB_TRACE_T, EOT };
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items.Collect( aBoard, scanTRACKs );
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std::string netname;
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WIRING* wiring = pcb->wiring;
PATH* path = 0;
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int old_netcode = -1;
int old_width = -1;
int old_layer = -1;
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for( int i=0; i<items.GetCount(); ++i )
{
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TRACK* track = (TRACK*) items[i];
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int netcode = track->GetNet();
if( netcode == 0 )
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continue;
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if( old_netcode != netcode
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|| old_width != track->m_Width
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|| old_layer != track->GetLayer()
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|| (path && path->points.back() != mapPt(track->m_Start) )
)
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{
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old_width = track->m_Width;
old_layer = track->GetLayer();
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if( old_netcode != netcode )
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{
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old_netcode = netcode;
NETINFO_ITEM* net = aBoard->FindNet( netcode );
wxASSERT( net );
netname = TO_UTF8( net->GetNetname() );
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}
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WIRE* wire = new WIRE( wiring );
wiring->wires.push_back( wire );
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wire->net_id = netname;
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wire->wire_type = T_protect; // @todo, this should be configurable
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int kiLayer = track->GetLayer();
int pcbLayer = kicadLayer2pcb[kiLayer];
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path = new PATH( wire );
wire->SetShape( path );
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path->layer_id = layerIds[pcbLayer];
path->aperture_width = scale( old_width );
path->AppendPoint( mapPt( track->m_Start ) );
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}
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path->AppendPoint( mapPt( track->m_End ) );
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}
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}
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2008-02-09 08:34:45 +00:00
//-----<export the existing real BOARD instantiated vias>-----------------
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{
// export all of them for now, later we'll decide what controls we need
// on this.
static const KICAD_T scanVIAs[] = { PCB_VIA_T, EOT };
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items.Collect( aBoard, scanVIAs );
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for( int i=0; i<items.GetCount(); ++i )
{
SEGVIA* via = (SEGVIA*) items[i];
wxASSERT( via->Type() == PCB_VIA_T );
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int netcode = via->GetNet();
if( netcode == 0 )
continue;
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PADSTACK* padstack = makeVia( via );
PADSTACK* registered = pcb->library->LookupVia( padstack );
// if the one looked up is not our padstack, then delete our padstack
// since it was a duplicate of one already registered.
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if( padstack != registered )
{
delete padstack;
}
WIRE_VIA* dsnVia = new WIRE_VIA( pcb->wiring );
pcb->wiring->wire_vias.push_back( dsnVia );
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dsnVia->padstack_id = registered->padstack_id;
dsnVia->vertexes.push_back( mapPt( via->GetPosition() ) );
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NETINFO_ITEM* net = aBoard->FindNet( netcode );
wxASSERT( net );
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dsnVia->net_id = TO_UTF8( net->GetNetname() );
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dsnVia->via_type = T_protect; // @todo, this should be configurable
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}
}
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#endif // do existing wires and vias
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//-----<via_descriptor>-------------------------------------------------
{
// The pcb->library will output <padstack_descriptors> which is a combined
// list of part padstacks and via padstacks. specctra dsn uses the
// <via_descriptors> to say which of those padstacks are vias.
// Output the vias in the padstack list here, by name only. This must
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// be done after exporting existing vias as WIRE_VIAs.
VIA* vias = pcb->structure->via;
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for( unsigned viaNdx=0; viaNdx < pcb->library->vias.size(); ++viaNdx )
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{
vias->AppendVia( pcb->library->vias[viaNdx].padstack_id.c_str() );
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}
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}
2008-02-01 01:09:39 +00:00
2008-02-07 20:23:58 +00:00
2009-09-10 15:22:26 +00:00
//-----<output NETCLASSs>----------------------------------------------------
NETCLASSES& nclasses = aBoard->m_NetClasses;
exportNETCLASS( nclasses.GetDefault(), aBoard );
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for( NETCLASSES::iterator nc = nclasses.begin(); nc != nclasses.end(); ++nc )
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{
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NETCLASS* netclass = nc->second;
exportNETCLASS( netclass, aBoard );
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}
}
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void SPECCTRA_DB::exportNETCLASS( NETCLASS* aNetClass, BOARD* aBoard )
2009-09-10 15:22:26 +00:00
{
/* From page 11 of specctra spec:
Routing and Placement Rule Hierarchies
Routing and placement rules can be defined at multiple levels of design
specification. When a routing or placement rule is defined for an object at
multiple levels, a predefined routing or placement precedence order
automatically determines which rule to apply to the object. The routing rule
precedence order is
pcb < layer < class < class layer < group_set < group_set layer < net <
net layer < group < group layer < fromto < fromto layer < class_class <
class_class layer < padstack < region < class region < net region <
class_class region
A pcb rule (global rule for the PCB design) has the lowest precedence in the
hierarchy. A class-to-class region rule has the highest precedence. Rules
set at one level of the hierarchy override conflicting rules set at lower
levels. The placement rule precedence order is
pcb < image_set < image < component < super cluster < room <
room_image_set < family_family < image_image
A pcb rule (global rule for the PCB design) has the lowest precedence in the
hierarchy. An image-to-image rule has the highest precedence. Rules set at
one level of the hierarchy override conflicting rules set at lower levels.
*/
char text[256];
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2009-09-10 15:22:26 +00:00
CLASS* clazz = new CLASS( pcb->network );
pcb->network->classes.push_back( clazz );
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2009-09-10 15:22:26 +00:00
// freerouter creates a class named 'default' anyway, and if we
// try and use that, we end up with two 'default' via rules so use
// something else as the name of our default class.
clazz->class_id = TO_UTF8( aNetClass->GetName() );
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2009-09-10 15:22:26 +00:00
for( NETCLASS::iterator net = aNetClass->begin(); net != aNetClass->end(); ++net )
clazz->net_ids.push_back( TO_UTF8( *net ) );
2008-02-14 15:34:40 +00:00
2009-09-10 15:22:26 +00:00
clazz->rules = new RULE( clazz, T_rule );
// output the track width.
int trackWidth = aNetClass->GetTrackWidth();
sprintf( text, "(width %.6g)", scale( trackWidth ) );
clazz->rules->rules.push_back( text );
// output the clearance.
int clearance = aNetClass->GetClearance();
sprintf( text, "(clearance %.6g)", scale( clearance ) + safetyMargin );
clazz->rules->rules.push_back( text );
if( aNetClass->GetName() == NETCLASS::Default )
{
clazz->class_id = "kicad_default";
}
// the easiest way to get the via name is to create a via (which generates
// the name internal to the PADSTACK), and then grab the name and then
// delete the via. There are not that many netclasses so
// this should never become a performance issue.
PADSTACK* via = makeVia( aNetClass->GetViaDiameter(), aNetClass->GetViaDrill(),
0, aBoard->GetCopperLayerCount()-1 );
snprintf( text, sizeof(text), "(use_via %s)", via->GetPadstackId().c_str() );
clazz->circuit.push_back( text );
delete via;
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}
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void SPECCTRA_DB::FlipMODULEs( BOARD* aBoard )
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{
for( MODULE* module = aBoard->m_Modules; module; module = module->Next() )
{
module->flag = 0;
if( module->GetLayer() == LAYER_N_BACK )
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{
2009-08-06 07:11:04 +00:00
module->Flip( module->m_Pos );
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module->flag = 1;
}
}
modulesAreFlipped = true;
}
void SPECCTRA_DB::RevertMODULEs( BOARD* aBoard )
{
if( !modulesAreFlipped )
return;
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// DSN Images (=KiCad MODULES and pads) must be presented from the
2008-01-25 22:03:36 +00:00
// top view. Restore those that were flipped.
for( MODULE* module = aBoard->m_Modules; module; module = module->Next() )
{
if( module->flag )
{
2009-08-06 07:11:04 +00:00
module->Flip( module->m_Pos );
2008-01-25 22:03:36 +00:00
module->flag = 0;
}
}
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modulesAreFlipped = false;
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}
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2008-01-21 21:24:39 +00:00
} // namespace DSN