Commit Graph

153 Commits

Author SHA1 Message Date
Jeff Young 4a05b36bc6 Prefer EDA_ANGLE to naked radians. 2022-01-20 21:10:04 +00:00
Jeff Young 038db715a3 Move zone hatch orientation to EDA_ANGLE. 2022-01-19 00:34:03 +00:00
Jeff Young e84c574830 Some more EDA_ANGLE cleanup. 2022-01-16 19:16:18 +00:00
Jeff Young 07013d00e1 More EDA_ANGLE. 2022-01-14 16:08:19 +00:00
Jeff Young 1b19ff5f42 More EDA_ANGLE changes. 2022-01-14 16:08:19 +00:00
Jeff Young c9487bad18 Move BOARD_ITEM::Rotate() to EDA_ANGLE. 2022-01-14 16:08:19 +00:00
Jeff Young abd3f5bc2b Move footprints to EDA_ANGLE. 2022-01-14 16:08:18 +00:00
Jeff Young d485eb2514 Move pads to EDA_ANGLE. 2022-01-14 16:08:18 +00:00
Marek Roszko 726d873c53 Tear down the wxPoint trigo helpers 2022-01-04 21:23:11 -05:00
Marek Roszko c4c56de708 Neurotically update position wxPoint usages 2022-01-01 11:55:51 -05:00
Jeff Young 86cb57f4a7 Cherry-pick TEXT_ATTRIBUTES and EDA_ANGLE from rockola/kicad-strokefont 2021-12-28 22:15:20 +00:00
Jeff Young fa908e1f98 Dimensions for footprints.
Fixes https://gitlab.com/kicad/code/kicad/issues/8441
2021-12-24 21:10:28 +00:00
Jeff Young 2bc86fa0a8 Shapes for schematic.
ADDED arc, circle and rectangle shapes for schematic.  Shapes support
line styles and fill colors.

CHANGED sheet background color in Edit Text & Graphics Properties to
fill color (and it now affects shapes).

Pushed STROKE_PARAMS down into common and moved all shapes to using it
for stroke descriptions.
2021-12-23 20:36:07 +00:00
Roberto Fernandez Bautista 13f081549c CADSTAR PCB: Use all User layers when mapping documentation layers
Fixes https://gitlab.com/kicad/code/kicad/-/issues/9577
2021-11-10 21:47:22 +00:00
Roberto Fernandez Bautista ad2e780a2c CADSTAR PCB: Correctly load pads with holes
If the THROUGH_HOLE attribute isn't set, it just means that the pads
are only present on one side of the board, but there can still be a
plated / non-plated hole.

Fixes https://gitlab.com/kicad/code/kicad/-/issues/9579
2021-11-10 21:21:32 +00:00
Seth Hillbrand 6cc6f06a9a Millimetres -> Millimeters 2021-11-08 15:56:51 -08:00
Seth Hillbrand 6569337d27 Haching -> Hatching 2021-11-08 15:56:51 -08:00
Roberto Fernandez Bautista 6aa7602c32 CADSTAR PCB: Reverse anticlockwise arcs before adding to the chain
Fixes https://gitlab.com/kicad/code/kicad/-/issues/9533
2021-11-05 17:13:02 +00:00
Roberto Fernandez Bautista 8314251fa1 CADSTAR PCB: Force white silkscreen and green soldermask
We don't know the actual colour from the design, but this is the most
common used in the industry.
2021-11-05 17:13:02 +00:00
Roberto Fernandez Bautista b2db24f275 CADSTAR PCB: Don't invert Text Angle for mirrored text
It matches the original cadstar when we don't invert
2021-10-30 18:14:23 +01:00
Roberto Fernandez Bautista 99442350a4 CADSTAR PCB: Fix loading of arc tracks following recent PCB_ARC changes
We no longer have any knowledge of the original start/end of the arc,
since SetArcAngleAndEnd swaps the start and end to ensure the arc is
always clockwise at the end.

Adds a method EDA_SHAPE::EndsSwapped() to notify whether the start/end
point of the shape were swapped.
2021-10-17 17:57:51 +01:00
Roberto Fernandez Bautista e867a4fd27 CADSTAR PCB: Fix Zone fill priorities
The algorithm now correctly determines fill priorities when the zone
outlines are close together and within the minimum clearance between
zones.
2021-10-16 21:50:56 +01:00
Jeff Young 9b9e379aa0 Overhaul arc internal model to not over-specify information. 2021-10-15 12:45:43 +01:00
Jeff Young 8b08c9e53f Shorter names before things get out of hand.
Also, remove comments indicating CURVE is a Bezier.  Just call it a
BEZIER.
2021-10-15 12:45:43 +01:00
Jeff Young a41944020d Push most of PCB_SHAPE impl down in to EDA_SHAPE. 2021-10-15 12:45:43 +01:00
Roberto Fernandez Bautista 43e59b0ea7 CADSTAR PCB: Correctly handle associated pad ids and PCB Only pads
Fixes https://gitlab.com/kicad/code/kicad/-/issues/9372
2021-10-11 18:30:20 +01:00
Roberto Fernandez Bautista 7a71ebf9ac CADSTAR PCB: Load all three net properties into a single Netclass
The final netclass name will be a bit long but it will allow for custom
DRC rules to individually target each of the three properties available
in CADSTAR:
- Route Code (which specifies width of the track in min, max, opt)
- Net class (only used in signal integrity analysis)
- Spacing class (for specifying clearance requirements between classes)
2021-10-10 22:16:08 +01:00
Roberto Fernandez Bautista ac3ade874e CADSTAR PCB: Set Copper-to-Hole clearance as 0
Testing suggests that CADSTAR doesn't actually have any clearance to the
hole (other than electrical clearance to the barrel of the padstack/
viastack).

This removes a large amount of DRC violations on imported designs.
2021-10-10 00:20:13 +01:00
Roberto Fernandez Bautista eb7d0fdf8a CADSTAR PCB: Use board clearance + additional isolation as zone clearance
Copper-to-copper clearance is too onerous and results in large amount
of DRC errors for the majority of imported designs.
2021-10-10 00:18:36 +01:00
Roberto Fernandez Bautista f4ff01a5ab CADSTAR PCB: Copy default netclass settings when creating new ones
Ensures that the global clearance is preserved in the newly created
netclass.
2021-10-09 23:10:55 +01:00
Roberto Fernandez Bautista 8f74085ca4 CADSTAR PCB: Handle older boards without construction layers
Use KiCad default stackup for older CADSTAR boards that do not
define any dielectric layers between the electrical layers.

Also fix default stackup calculation to ensure finished board thickness
is 1.6mm
2021-10-09 21:26:16 +01:00
Roberto Fernandez Bautista 33a3cfc87b CADSTAR PCB: Update Board Design Settings to notify that a stackup exists
Also update thickness of the PCB

Fixes https://gitlab.com/kicad/code/kicad/-/issues/9307
2021-10-09 20:33:14 +01:00
Roberto Fernandez Bautista e80a1c2679 CADSTAR PCB: Don't load items on invalid layers
This was happening in two cases:
- Loading documentation symbols (CADSTAR on purpose defines these in an
  invalid layer)
- When an item was in a "layer set" such as ALLELEC or ALLLAYER - need to
  make sure we remove the copper layers that are not active in the design
2021-10-09 20:07:23 +01:00
Roberto Fernandez Bautista 677166f0b8 CADSTAR PCB: Rule Areas have zero width
Cadstar areas have a line width but this is only for display purposes.
Instead CADSTAR uses the center line when determining whether a DRC
violation occurred.
2021-10-08 21:27:32 +01:00
Roberto Fernandez Bautista 2dfbd42be6 CADSTAR PCB: Legacy netclass and design settings loading is required 2021-10-08 20:48:10 +01:00
Roberto Fernandez Bautista ae0229b7c9 CADSTAR PCB: Add imported nets to the imported netclass. 2021-10-08 20:25:09 +01:00
Roberto Fernandez Bautista 58fc4f512d CADSTAR PCB: Don't create zero width tracks
Fixes a bug in the route offsetting part of the import
that was resulting in zero-width tracks being imported.
2021-10-08 20:25:09 +01:00
Roberto Fernandez Bautista 16b61e47cd CADSTAR PCB: Clear arcs from polys before boolean ops (e.g. zone fills) 2021-10-08 20:25:09 +01:00
Roberto Fernandez Bautista fb588da875 CADSTAR PCB: Fix loading of thermal relief gap in zones
We were loading as solid fill when the relief gap was exactly the
same as the minimum width.

Also we can do better than just load as solid fill when it is smaller:
we can instead just use the minimum width and at least it still will
have thermal reliefs.
2021-10-08 17:39:08 +01:00
Roberto Fernandez Bautista cb47bf25c0 CADSTAR PCB: Actually load the original route code as a KiCad NETCLASS
We weren't actually loading it into the design settings even though
everything else was already being correctly loaded.
2021-10-07 22:13:06 +01:00
Roberto Fernandez Bautista 625e56676a Add progress reporting to CADSTAR Schematic & PCB importers
Fixes https://gitlab.com/kicad/code/kicad/-/issues/8685
2021-09-11 17:50:19 +01:00
Jeff Young e6ca9837a2 Clear numbers from non-numberable pads and don't run DRC on them.
This was also the last straw on the misnamed PAD::GetName() and
PAD::SetName(), which are now PAD::GetNumber() and PAD::SetNumber().

Fixes https://gitlab.com/kicad/code/kicad/issues/9017
2021-08-24 01:03:06 +01:00
Wayne Stambaugh 8fd83cbb95 Pass wxPoint objects by reference instead of on the stack. 2021-07-26 15:35:33 -04:00
Jeff Young 0fb864d596 Pull some name changes back from 7.0 to ease merging. 2021-07-21 20:58:59 +01:00
Jeff Young e61822c9e0 Naming conventions and a bug fix on arc points. 2021-07-19 13:17:12 +01:00
Jeff Young 062c4fda62 More error message regularization (and translatability improvements). 2021-06-28 00:45:24 +01:00
Jeff Young 0dfb5fcaf9 Error message cleanup.
wxString::Format is redundant in a wxLogXXX call.
Error messages should generally be translatable.
Error messages should use generally consistent sentence forms.
2021-06-26 22:53:24 +01:00
Jeff Young 81fc710a5d Use consistent terminology.
Fixes https://gitlab.com/kicad/code/kicad/issues/8681
2021-06-26 10:11:41 +01:00
Jeff Young 096e342386 Prefix TRACK, ARC and VIA. 2021-06-11 22:07:02 +01:00
Jeff Young 16b0147af8 Prefix DIMENSION types. 2021-06-11 17:59:44 +01:00