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351 Commits

Author SHA1 Message Date
Jeff Young f9861b4a6c Finish arc rework and push out to file formats. 2021-10-15 12:45:43 +01:00
Jeff Young 9b9e379aa0 Overhaul arc internal model to not over-specify information. 2021-10-15 12:45:43 +01:00
Jeff Young 8b08c9e53f Shorter names before things get out of hand. 
Also, remove comments indicating CURVE is a Bezier.  Just call it a
BEZIER.
 2021-10-15 12:45:43 +01:00
Jeff Young a41944020d Push most of PCB_SHAPE impl down in to EDA_SHAPE. 2021-10-15 12:45:43 +01:00
Roberto Fernandez Bautista 43e59b0ea7 CADSTAR PCB: Correctly handle associated pad ids and PCB Only pads 
Fixes https://gitlab.com/kicad/code/kicad/-/issues/9372
 2021-10-11 18:30:20 +01:00
Roberto Fernandez Bautista 7a71ebf9ac CADSTAR PCB: Load all three net properties into a single Netclass 
The final netclass name will be a bit long but it will allow for custom
DRC rules to individually target each of the three properties available
in CADSTAR:
- Route Code (which specifies width of the track in min, max, opt)
- Net class (only used in signal integrity analysis)
- Spacing class (for specifying clearance requirements between classes)
 2021-10-10 22:16:08 +01:00
Roberto Fernandez Bautista ac3ade874e CADSTAR PCB: Set Copper-to-Hole clearance as 0 
Testing suggests that CADSTAR doesn't actually have any clearance to the
hole (other than electrical clearance to the barrel of the padstack/
viastack).

This removes a large amount of DRC violations on imported designs.
 2021-10-10 00:20:13 +01:00
Roberto Fernandez Bautista eb7d0fdf8a CADSTAR PCB: Use board clearance + additional isolation as zone clearance 
Copper-to-copper clearance is too onerous and results in large amount
of DRC errors for the majority of imported designs.
 2021-10-10 00:18:36 +01:00
Roberto Fernandez Bautista f4ff01a5ab CADSTAR PCB: Copy default netclass settings when creating new ones 
Ensures that the global clearance is preserved in the newly created
netclass.
 2021-10-09 23:10:55 +01:00
Roberto Fernandez Bautista 8f74085ca4 CADSTAR PCB: Handle older boards without construction layers 
Use KiCad default stackup for older CADSTAR boards that do not
define any dielectric layers between the electrical layers.

Also fix default stackup calculation to ensure finished board thickness
is 1.6mm
 2021-10-09 21:26:16 +01:00
Roberto Fernandez Bautista 33a3cfc87b CADSTAR PCB: Update Board Design Settings to notify that a stackup exists 
Also update thickness of the PCB

Fixes https://gitlab.com/kicad/code/kicad/-/issues/9307
 2021-10-09 20:33:14 +01:00
Roberto Fernandez Bautista e80a1c2679 CADSTAR PCB: Don't load items on invalid layers 
This was happening in two cases:
- Loading documentation symbols (CADSTAR on purpose defines these in an
  invalid layer)
- When an item was in a "layer set" such as ALLELEC or ALLLAYER - need to
  make sure we remove the copper layers that are not active in the design
 2021-10-09 20:07:23 +01:00
Roberto Fernandez Bautista 677166f0b8 CADSTAR PCB: Rule Areas have zero width 
Cadstar areas have a line width but this is only for display purposes.
Instead CADSTAR uses the center line when determining whether a DRC
violation occurred.
 2021-10-08 21:27:32 +01:00
Roberto Fernandez Bautista 2dfbd42be6 CADSTAR PCB: Legacy netclass and design settings loading is required 2021-10-08 20:48:10 +01:00
Roberto Fernandez Bautista ae0229b7c9 CADSTAR PCB: Add imported nets to the imported netclass. 2021-10-08 20:25:09 +01:00
Roberto Fernandez Bautista 58fc4f512d CADSTAR PCB: Don't create zero width tracks 
Fixes a bug in the route offsetting part of the import
that was resulting in zero-width tracks being imported.
 2021-10-08 20:25:09 +01:00
Roberto Fernandez Bautista 16b61e47cd CADSTAR PCB: Clear arcs from polys before boolean ops (e.g. zone fills) 2021-10-08 20:25:09 +01:00
Roberto Fernandez Bautista fb588da875 CADSTAR PCB: Fix loading of thermal relief gap in zones 
We were loading as solid fill when the relief gap was exactly the
same as the minimum width.

Also we can do better than just load as solid fill when it is smaller:
we can instead just use the minimum width and at least it still will
have thermal reliefs.
 2021-10-08 17:39:08 +01:00
Roberto Fernandez Bautista cb47bf25c0 CADSTAR PCB: Actually load the original route code as a KiCad NETCLASS 
We weren't actually loading it into the design settings even though
everything else was already being correctly loaded.
 2021-10-07 22:13:06 +01:00
Seth Hillbrand 9a8d1246cc We don't keep a CHANGELOG.TXT 
Direct interested readers to AUTHORS.TXT instead.
 2021-10-05 19:46:53 -07:00
Seth Hillbrand 548e5f49bd Clean up unused variable usage 
Unused variables in function calls can be commented out.  Unused
return variables get a new routine `ignore_unused()` that silences the
warnings with zero overhead.
 2021-10-05 10:00:30 -07:00
Jeff Young f606679164 Proper numeric sorting for intersheet refs. 
Also expunges the horrifically named std::remove and std::remove_if
(neither of which remove anything).
 2021-10-01 18:29:21 +01:00
Jeff Young 6b25099df7 Read/write lock status for fp text. 
Fixes https://gitlab.com/kicad/code/kicad/issues/9325
 2021-09-25 20:37:56 +01:00
Jeff Young 04aff93248 Eagle doesn't use netclass clearance so make them the board clearance. 
Fixes https://gitlab.com/kicad/code/kicad/issues/2442
 2021-09-20 21:31:19 +01:00
Jeff Young f66654247a Read netclasses when importing Eagle projects. 
Also creates a DRU file with the various netclass-to-netclass
clearance rules from the Eagle clearance matrix.

Fixes https://gitlab.com/kicad/code/kicad/issues/1774
 2021-09-20 12:38:56 +01:00
Jeff Young b84d1456d5 KIFACE_I -> KIFACE_BASE. 2021-09-14 23:45:14 +01:00
Roberto Fernandez Bautista 625e56676a Add progress reporting to CADSTAR Schematic & PCB importers 
Fixes https://gitlab.com/kicad/code/kicad/-/issues/8685
 2021-09-11 17:50:19 +01:00
jean-pierre charras d2bff137ee .kicad_pcb file: fix incorrect keyword stored for some (not all) PAD properties. 
( a copy-paste error? )
Fixes #9102
https://gitlab.com/kicad/code/kicad/issues/9102
 2021-09-06 09:15:18 +02:00
jean-pierre charras ee5f9034f7 pcb parser: ensure the parser is reinitialized before parsing a new fp file 
Because the same parser is used to read all footprint files of a library,
the parser must be reinitialized (internal variable cleared) before reading
a new file, otherwise the previous parser state is applied to the next file.
Fixes #7627
https://gitlab.com/kicad/code/kicad/issues/7627
 2021-08-26 19:38:20 +02:00
Jeff Young 2b3477ca28 Handle RGBA conversion to hexadecimal format for wxWidgets 3.0 2021-08-25 02:40:17 +01:00
Jeff Young a02ea1609b A more robust solution to the 3D color opacity issue. 
(This also fixes a typo in the previous fix that assigned the opacities
backwards.)
 2021-08-24 11:24:25 +01:00
Jeff Young e6ca9837a2 Clear numbers from non-numberable pads and don't run DRC on them. 
This was also the last straw on the misnamed PAD::GetName() and
PAD::SetName(), which are now PAD::GetNumber() and PAD::SetNumber().

Fixes https://gitlab.com/kicad/code/kicad/issues/9017
 2021-08-24 01:03:06 +01:00
Jeff Young 21f2b235ce Rework stackup colors a bit to support opacity for 3D viewer. 
Fixes https://gitlab.com/kicad/code/kicad/issues/9012
 2021-08-23 20:00:17 +01:00
Jeff Young fec34e8dd8 Get rid of an extraneous layer parameter. 
Also adds a bit of nullptr safety.
 2021-08-23 20:00:17 +01:00
Jeff Young 41619ebbe2 Decouple PROGRESS_REPORTER interface from implementations. 2021-08-14 21:05:49 +01:00
Jeff Young 54942a1401 Fix typos that would result in fp zone setting written into pads. 2021-08-08 18:12:29 +01:00
Jeff Young 46bdce2747 Don't allow pads in groups in the board editor. 
Bad stuff happens, including crashes.
 2021-08-04 13:55:42 +01:00
Jeff Young 0f5a8f87d3 Add writing of pad primitive polys with arcs, and fix a bug in reading. 
Fixes https://gitlab.com/kicad/code/kicad/issues/8827
 2021-08-01 10:47:00 +01:00
Jeff Young 6aaf4413b3 Fix kicad_string.h / string.cpp mismatch. 
They don't define a KiCad string class, so the header file name was
somewhat misleading. But the fact that they didn't match definitely
made coding more difficult.
 2021-07-29 16:03:25 +01:00
Jeff Young f221220fe2 Rename layer ids file. 
It hasn't had anything to do with colors or visibility for some time
now.
 2021-07-29 16:03:25 +01:00
Jeff Young 46338403e7 Unwrap some std::library typedefs. 2021-07-28 22:16:38 +01:00
Wayne Stambaugh 369d813a32 Pass std::string by reference instead of on the stack where applicable. 2021-07-27 13:30:05 -04:00
Wayne Stambaugh 37b200cb3e Pass wxString objects by reference instead of on the stack. 2021-07-27 08:41:27 -04:00
Wayne Stambaugh 8fd83cbb95 Pass wxPoint objects by reference instead of on the stack. 2021-07-26 15:35:33 -04:00
Jeff Young 373f0335c8 Convert Altium radial dimensions to leaders. 
This is because we don't yet support radial dimensions.

Also fixes a bug where we fail to read an Altium circular track.  We
now convert it to a pair of 180-degree arcs.

Also fixes a bug where we were failing to import prefixes on linear
dimensions.

Fixes https://gitlab.com/kicad/code/kicad/issues/8789
 2021-07-24 14:25:59 +01:00
Jeff Young 531f5480a7 Reduce line-breaks and increase SNR. 2021-07-24 14:25:59 +01:00
Jeff Young 04b9b15255 Fix copy/paste error. 2021-07-23 01:11:22 +01:00
Jeff Young a16b85db67 Read/write group locked state. Show locked state in dialog & statusbar. 
Fixes https://gitlab.com/kicad/code/kicad/issues/8796
 2021-07-22 12:49:30 +01:00
Jeff Young 0fb864d596 Pull some name changes back from 7.0 to ease merging. 2021-07-21 20:58:59 +01:00
david-beinder af90d47edc Altium: Fix calculating third arc point from uninitialized memory 
Fixes https://gitlab.com/kicad/code/kicad/-/issues/8671
 2021-07-20 19:13:32 +00:00