Jeff Young
45113f983b
Fix test case.
...
Silk tests were processing MODULE_Ts when they shouldn't have been.
2020-10-25 23:19:39 +00:00
Jeff Young
2ee61f52ca
Implement correct layer handling for keepout constraints.
2020-10-25 22:47:47 +00:00
Jeff Young
8c93fc76ae
Don't require keepout zones to be named.
...
insideArea() now takes A, B, a UUID or a zone name. (Only the UUID
is new.)
2020-10-25 21:08:09 +00:00
Jeff Young
5b1e1075a9
Allow an easy way for DRC tests to specify compound objects or not.
2020-10-25 20:24:47 +00:00
Jeff Young
386cefbe84
Do footprint keepouts by courtyard.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/6162
2020-10-25 18:17:58 +00:00
jean-pierre charras
d6f91c810f
Fix a few compil and Coverity warnings.
2020-10-25 10:02:07 +01:00
Marek Roszko
e928b2d8fd
Split EDA_UNITS out from common.
2020-10-25 00:02:52 -04:00
Jeff Young
7674d2ba91
Free allocated DRC structures when re-initializing.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/6147
2020-10-24 22:39:53 +01:00
David Shah
66bcfb3ffc
drc_engine: Fix via type names
...
There was a mismatch between the via type names used in the DRC engine
and the via type names defined in the class_track.cpp ENUM_MAP for
VIATYPE.
This fixes the discrepancy; which was breaking microvias altogether as
the route tool also uses the DRC code to determine the correct
diameter/drill (without this patch it was incorrectly using regular
dimensions for microvias.)
2020-10-24 15:46:47 +00:00
Jeff Young
59f3fefd17
When polygonizing arcs don't use synthesized center and angle.
...
Start, mid and end are the "real" properties and come with less
error.
Also collapses two arc polygonization routines into one.
Also fixes DRC checks to be cognizant of arc approximation error.
Fixes https://gitlab.com/kicad/code/kicad/issues/6039
2020-10-23 23:55:45 +01:00
Seth Hillbrand
19bf594aa0
Remove unused point in polygon test
...
There can be only one.
2020-10-23 12:13:09 -07:00
Jeff Young
01ce881340
Honour NOT_IN_SCHEMATIC setting.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/6137
2020-10-23 17:27:18 +01:00
Jeff Young
cce557b9ad
Redo the board-edge-building logic to return better error reports.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/6119
2020-10-22 21:29:04 +01:00
Jeff Young
41fd8293e8
Don't apply clearance to keepout zones.
...
Also improves the clearance and keepout reporting.
Fixes https://gitlab.com/kicad/code/kicad/issues/6118
2020-10-22 21:29:04 +01:00
Jeff Young
9ff49277e1
Add implicit rule generation for keepout areas.
...
Also implements collision detection for SHAPE_POLY_SET.
Fixes https://gitlab.com/kicad/code/kicad/issues/6105
2020-10-22 10:41:21 +01:00
Seth Hillbrand
4085757aeb
Remove beginning/ending spaces in translations
...
Adding space padding makes translations more difficult by increasing
string counts
2020-10-20 12:08:04 -07:00
Jeff Young
18f9f3cf0b
Add curved track support to track-to-zone DRC.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/6039
2020-10-20 13:38:09 +01:00
Wayne Stambaugh
8ff51d8899
Eeschema: add schematic sheet page number.
...
The groundwork has now been laid for per sheet instance data. Initially
this only supports sheet page numbers but could be expanded to include
other per sheet instance information.
ADDED: Support for user defined schematic page numbers.
2020-10-19 14:05:45 -04:00
Jeff Young
c5d45f8a78
Move DRC dialog to same DRC rule reporting mechanism as inspectors.
2020-10-17 20:40:05 +01:00
Jeff Young
6e54856e67
Don't halt other tests when one test's max is reached.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/6035
2020-10-17 12:13:04 +01:00
Jeff Young
1b2168af1e
Don't throw implicit rules out after failing to compile user rules.
2020-10-16 12:44:20 +01:00
Jeff Young
eea7957e16
Inform user of bad DRC rules when filling zones.
...
ADDED: facility for hypertext links in infobar.
Also made use of this for via constraint errors when routing.
Fixes https://gitlab.com/kicad/code/kicad/issues/5800
2020-10-16 12:44:20 +01:00
Jeff Young
6b7749658e
Report all implicit rules for resolution reports.
2020-10-15 20:53:27 +01:00
Jeff Young
ebd5dc81cc
Fix some more cases of malformed syntax crashing the compiler.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/6016
2020-10-15 18:32:52 +01:00
Jeff Young
5ac17288a9
Work around missing copy constructor for PCB_SHAPE.
...
Also introduces performance enhancements so that single closed shapes
for board edges don't eliminate the effectiveness of the RTree.
Fixes https://gitlab.com/kicad/code/kicad/issues/5990
2020-10-15 11:38:18 +01:00
Jeff Young
1d93effa14
Don't build RTrees if test results will be ignored.
2020-10-14 15:56:32 +01:00
Jeff Young
f220e83de6
Board edges have no width.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/5990
2020-10-14 15:56:32 +01:00
Marek Roszko
2c86363aa0
Relocate the page_layout includes to a page_layout folder
2020-10-13 20:33:33 -04:00
Jon Evans
cb1d416e5a
Use settings keys, not error codes, for ERC/DRC reports
...
Error codes can shift around if the enum ordering is
not maintained, which is more fragile than the settings
key which should never be changed after a new code is
created.
Fixes https://gitlab.com/kicad/code/kicad/-/issues/6001
2020-10-13 18:03:07 -04:00
Jeff Young
3fc1a0c314
Fix faulty copper-checking logic.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/5978
2020-10-13 16:32:54 +01:00
Jeff Young
2e6968e7eb
Board edges tester also needs to check silk text for visibility.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/5989
2020-10-13 00:58:38 +01:00
Marek Roszko
83d231cd49
Fix test under msvc
2020-10-12 19:47:36 -04:00
Jeff Young
8c4197db2a
Netclass track widths and via sizes are opts, not mins.
2020-10-13 00:34:10 +01:00
Jeff Young
cd1a5ed6fb
Implement progress reporting for DRC RTree.
...
Also fixes a bug in silk-to-mask checking which wasn't checking
zones on the mask layer.
Also a perfomance fix for the DRC RTree to use a hash table (std::map)
instead of a std::set for keeping track of known collisions.
Fixes https://gitlab.com/kicad/code/kicad/issues/5851
2020-10-13 00:03:58 +01:00
Jeff Young
5afae757ff
Remove silk_clearance == 0 hack now that we have implied rules.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/5977
2020-10-12 21:13:26 +01:00
Jeff Young
af90642440
Hook board edge clearance constraints up to zone filling.
...
Also hooks them up to the clearance resolution reporter, and makes
some general improvements to reporting.
Fixes https://gitlab.com/kicad/code/kicad/issues/5947
2020-10-12 18:31:00 +01:00
Jeff Young
32dffd27ab
Add silk clearance to board setup constraints.
2020-10-12 18:31:00 +01:00
Jeff Young
1bcefe420a
Move compound graphics tests back out to the shared path.
2020-10-12 11:46:08 +01:00
Jeff Young
72f6127e53
Clean up terminology so it matches the user message better.
2020-10-12 00:14:32 +01:00
Jeff Young
8e70381be3
Don't try and infer optimum widths for board minimums.
...
It doesn't work well with sorting the implicit rules by clearance.
Fixes https://gitlab.com/kicad/code/kicad/issues/5951
2020-10-11 17:17:21 +01:00
Jeff Young
af28ef9d56
Add silk clearance checking to Resolve Clearances...
...
Also fixes a bug in order of RTrees in silk collision checker.
2020-10-11 14:18:11 +01:00
Jeff Young
42eecdfd3a
Collapse silk constraints down to one.
...
Also updates the rule syntax help and code-completion with a bunch
of diff-pair and other stuff that hadn't been updated yet.
2020-10-11 13:19:23 +01:00
Jeff Young
bcebb19665
Add implied diffpair netclass rules.
2020-10-11 13:19:23 +01:00
Jeff Young
22cde88ba9
Allow chamfering/filleting of zone/board edge intersections.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/5947
2020-10-10 23:09:43 +01:00
Jeff Young
04c4012ee6
Make track/via sizes UI more predictable and compatible with DRC.
...
Two main changes: netclass values need to go through the DRC engine
so they can interact with other rules. They're also now dependent
on the layer being routed as well as the start object.
Also make the controls adjust to each other better. For instance,
copy-track-width needs to turn off when you select a particular
track width, and a particular track width needs to zero out when
you choose copy-track-width.
Fixes https://gitlab.com/kicad/code/kicad/issues/5951
2020-10-10 19:32:30 +01:00
Jeff Young
fdeb340d21
Defensive code against missing nets.
...
Also adds net re-parenting code to Repair Board.
Fixes https://gitlab.com/kicad/code/kicad/issues/5935
2020-10-10 16:54:19 +01:00
Jeff Young
90baed7e82
Fix typo of transposed semi-colon and comma.
...
Also eases translation of strings while we're here.
Fixes https://gitlab.com/kicad/code/kicad/issues/5933
2020-10-10 12:25:22 +01:00
Jeff Young
1fc94c7a2d
Fix printf arg mismatch.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/5933
2020-10-09 13:57:49 +01:00
Jeff Young
0c7630f8b4
Get rid of wxWidgets assert.
2020-10-09 00:31:29 +01:00
Jeff Young
4f2e574f4b
Move IsADiffPair to drc_engine.cpp for now.
...
Otherwise we have to include drc_test_provider_diff_pair_coupling.cpp
in CVPCB, which isn't ideal either.
I'll let Tom figure out the best plan going forward, but this should
at least get things compiling/linking again.
2020-10-09 00:05:22 +01:00
Jeff Young
6550e01318
Sort synthetic netclass rules by min clearance.
...
This way when 'A' and 'B' have different netclasses the largest will
fire (rather than just a random one of the two).
Fixes https://gitlab.com/kicad/code/kicad/issues/5926
2020-10-08 23:41:27 +01:00
Tomasz Wlostowski
b5fa523a11
PCB_EXPR_EVALUATOR: added isDiffPair() API method
2020-10-09 00:01:26 +02:00
Tomasz Wlostowski
5c2c66dd07
drc: sane default rules for via diameters/diff pair widths/diff pair gaps (required by the P&S)
2020-10-09 00:01:26 +02:00
Tomasz Wlostowski
8a7fc7e970
drc: more robust segment pair detection, still issues with approximated arc corners though...
2020-10-07 16:36:37 +02:00
Tomasz Wlostowski
719363fa4a
Factor out class MINOPTMAX<> into a separate header
2020-10-07 16:36:37 +02:00
Jeff Young
f620f8bdd3
Report silk/edge collisions.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/5854
2020-10-06 13:20:52 +01:00
Jeff Young
0751965b2b
Be more responsive to user cancel.
2020-10-05 22:31:52 +01:00
Jeff Young
5705859e9e
Remove accidental debug code.
2020-10-05 12:27:21 +01:00
Jeff Young
37906511f5
Class renaming.
...
DRAWSEGMENT -> PCB_SHAPE
EDGE_MODULE -> FP_SHAPE
TEXTE_PCB -> PCB_TEXT
TEXTE_MODULE -> FP_TEXT
2020-10-05 11:55:33 +01:00
Jeff Young
7a4900b8dc
PCB_LINE_T -> PCB_SHAPE_T and PCB_MODULE_EDGE_T -> PCB_FP_SHAPE_T
...
Also updated footprint text and zone types for consistencey.
2020-10-04 16:49:04 +01:00
Jeff Young
85c6cebd77
Rework silk-to-pad checker to handle all solder mask clipping of silk.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/5851
2020-10-04 13:21:01 +01:00
Jeff Young
36ceb8075e
Fix logic bug in DRC RTree handler.
...
Return value from visitor is whether or not to keep searching, not
whether or not there was a collision.
2020-10-04 13:21:01 +01:00
Jeff Young
44580acee2
Clean up some compiler warnings.
2020-10-03 22:55:34 +01:00
Mikolaj Wielgus
400c15b8eb
Add mils to units, remove useMils variables
2020-10-03 20:06:56 +00:00
jean-pierre charras
3144bab36f
final cleanup about removing useless include
2020-10-03 16:40:36 +02:00
jean-pierre charras
0b23cb7dbb
more cleanup about removing useless include
2020-10-03 15:26:03 +02:00
Jeff Young
bea5914726
Make sure all DRC paths check for via/pad being flashed on layer.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/5830
2020-10-03 14:20:19 +01:00
jean-pierre charras
e76736b7bf
Fix a few Coverity warnings
2020-10-03 12:47:41 +02:00
Tomasz Wlostowski
5ef1dc17ad
drc: ignore silk2pad/silk2silk violations for hidden text objects
2020-10-02 21:06:52 +02:00
Tomasz Wlostowski
ca8aca6faa
drc: implement DRC_RTREE::CheckColliding
2020-10-02 21:06:52 +02:00
Tomasz Wlostowski
8eb9d34aad
drc: silk to silk clerance test should not report errors for hidden text
2020-10-01 18:55:53 +02:00
Tomasz Wlostowski
aee16efe32
drc: LVS test should not throw an error if running in no-project mode
2020-10-01 18:55:53 +02:00
jean-pierre charras
f702da95c7
Minor code cleanup, step2: remove more useless include.
...
fix also a minor compil warning
2020-10-01 15:39:47 +02:00
jean-pierre charras
3f8c9d49f8
Revert "Code cleanup: remove useless wx/wx.h include inside a few files."
...
due to compil issue on Linux
This reverts commit cffccc3970
.
2020-09-30 20:47:20 +02:00
jean-pierre charras
cffccc3970
Code cleanup: remove useless wx/wx.h include inside a few files.
...
in most of files, including wx.h is not necessary, when only 2 or 3 wx files must be included.
Moreover, on windows, including wx.h sometimes create compil warnings about
shadowed vars defined in some specific windows headers.
2020-09-30 20:03:27 +02:00
Seth Hillbrand
bf3cb0b1d0
Standardize pad type enums
2020-09-30 08:38:35 -07:00
Jeff Young
d3f8f2b81e
Remove confusion between pad->IsOnLayer and pad->IsPadOnLayer
2020-09-30 11:50:51 +01:00
Jeff Young
ab033327c7
Limit checks need to be done at start, not end.
...
(We also use the limit checks to ignore violations.)
Fixes https://gitlab.com/kicad/code/kicad/issues/5831
2020-09-29 21:23:26 +01:00
Jeff Young
2cf303bb09
Test against pad hole cylinder when pad is not on layer.
2020-09-29 18:18:19 +01:00
Jeff Young
66454ec895
Don't do hole-to-pad clearance testing on compound pads.
...
Fixes https://gitlab.com/kicad/code/kicad/issues/5822
2020-09-29 14:11:32 +01:00
Jeff Young
bf67648562
Support optional location reporting in SHAPE collisions.
...
Also fixes a few bugs in the collision routines.
2020-09-28 23:28:33 +01:00
Jeff Young
09ab269770
Support for 'L' in DRC expression language.
...
Also make layer testing work again against both canonical names and
user names.
2020-09-27 21:33:37 +01:00
Tomasz Wlostowski
c5c6b97c8b
drc: fixed warnings in length matcher
2020-09-27 17:51:16 +02:00
Tomasz Wlostowski
fbb669aa75
drc: diff pair test provider reports gap & max uncoupled length violations.
2020-09-27 17:50:57 +02:00
Tomasz Wlostowski
8e9a39e17c
drc: fix incorrect DRCE_LAST
2020-09-27 17:50:24 +02:00
Tomasz Wlostowski
5874373a0c
drc: unfinished version of diff pair gap/coupled length test
2020-09-27 16:45:46 +02:00
Tomasz Wlostowski
9b4504e73f
drc: report from-to paths for length matched signals
2020-09-27 16:45:46 +02:00
Tomasz Wlostowski
adf7d3260d
drc: parse diff pair constranits
2020-09-27 16:45:46 +02:00
Tomasz Wlostowski
cb2dfcde83
drc: error codes for diff-pair related stuff
2020-09-27 16:45:46 +02:00
Tomasz Wlostowski
bd0bd5b84b
drc: support for skew & via_count constraints. Length test now generates a length report
2020-09-27 16:45:46 +02:00
Tomasz Wlostowski
f38147c201
drc: add support for via_count constraint to the parser
2020-09-27 16:45:46 +02:00
Tomasz Wlostowski
2258c861c9
drc: initial version of matched trace lengths test provider
2020-09-27 16:45:46 +02:00
Tomasz Wlostowski
2bacfe8202
drc: use R-Tree intersection for silk clearance tests
2020-09-27 16:45:46 +02:00
Tomasz Wlostowski
b215361b30
drc: default constraints for silk2pad, silk2silk
2020-09-27 16:45:46 +02:00
Tomasz Wlostowski
26e7dc6e14
drc: added length/skew constraint types
2020-09-27 16:45:46 +02:00
Tomasz Wlostowski
abe354773f
drc: initial version of tree intersection (QueryCollidingPairs)
2020-09-27 16:45:46 +02:00
Tomasz Wlostowski
8405793e57
drc: add error codes for length/skew/via count violations
2020-09-27 16:45:46 +02:00
Tomasz Wlostowski
201a630740
drc: extend drc-rules file format with length and skew tokens
2020-09-27 16:45:46 +02:00
Tomasz Wlostowski
6578a76b72
drc: first R-tree based test (silk to pad clearance)
2020-09-27 16:45:46 +02:00
Tomasz Wlostowski
43404d4577
drc: be more verbose when skipping LVS due to lack of schematic netlist
2020-09-27 16:45:46 +02:00