Commit Graph

425 Commits

Author SHA1 Message Date
Sean Cross d00607f71a samd: parameterize memory and flash sizes
Various SAMD devices have different amounts of memory. Up until now, all
SAMD devices have had the same amount, and therefore this value was
hardcoded to 32k of RAM and 256k of flash.

Add a parameter to the description field and set it to default to the
previous values. Use this description field when adding memories to the
target definition.

Signed-off-by: Sean Cross <sean@xobs.io>
2021-12-29 15:25:51 +01:00
Koen De Vleeschauwer d4cd81fa36 start_time undeclared if ENABLE_DEBUG=1 2021-11-21 12:57:30 +01:00
Uwe Bonnes 73b4612ec7 adiv5_swdp: Initialize a volatile variable
GCC did not warn about possibly missing initialization and so for gdb target
was not recognized.
2021-11-20 22:38:35 +01:00
Uwe Bonnes 5cb501049a adiv5_swdp/scan: Handle parity errors, seen with NRF52 with SYSTEMOFF #381/#949 2021-11-18 22:59:17 +01:00
fabalthazar 92d6056711 STM32G0 OTP area programming 2021-11-15 21:19:08 +01:00
Koen De Vleeschauwer 73624826b6 semihosting exit code 2021-11-14 12:03:33 +01:00
Uwe Bonnes 181466549b adiv5: Progressive incrementing TRNCNT for the DHCSR write when trying to halt
Workaround for CMSIS-DAP/Bulk debugger orbtrace  that returns NO_ACK
with high values of TRNCNT. Perhaps only STM32F767 needs write to DHCSR
with high occupancy to catch the device in a moment not sleeping.
2021-10-31 12:55:41 +01:00
Uwe Bonnes 88e44d1c12 cmsis: use exception in wait_word(). 2021-10-31 12:55:41 +01:00
Uwe Bonnes a1d4649795 SWD: Use dp_low_write to allow multidrop scan. 2021-10-31 12:55:41 +01:00
Uwe Bonnes 4f36c1ddf8 Remove dp_low_read() and use exception protected dp_read() 2021-10-31 12:55:41 +01:00
Uwe Bonnes d144f9d54b adiv5: CMSIS DAP transactions are slow but work in principle
Slowness results in strange STM32F767 DHCSR implementation to nearly never
halt in the given 2 second period when F767 is sleeping most of the time.
2021-10-31 12:55:41 +01:00
Uwe Bonnes 761e0230d4 cmsis-dap: Print messages when transfers fail.
Expect signal integrity errors when using jumper cables. Often probes switch
the SWJ GPIO with highest speed, resulting in possible reflections. Additional
ground wires may help. If there is isolation between probe and targets,
additional ground wires are a must or ground shift will wrack the transfer!
2021-10-31 12:55:41 +01:00
Uwe Bonnes c13778139f adiv5/hosted: Export the BMP_TYPE in DP. 2021-10-31 12:55:41 +01:00
Uwe Bonnes b7e7aa3f9a adiv5: Either use only LL functions in cortexm_initial_halt or no LL at all.
Platform implementation may disturb ADIV5_AP_DRW and so low_read DHCSR may
give values other from registers
2021-10-31 12:55:41 +01:00
Uwe Bonnes 8845a22226 stm32l4: Use targetid when available.
Fixes STM32U5 from crashing.
2021-10-31 11:13:34 +01:00
Uwe Bonnes 5dafc0828c SWD: Remove excessive line resets. 2021-10-31 11:12:46 +01:00
SG 7307f086c6
Support for STM32WB55 (#942)
* add STM32WB55 support
2021-10-30 13:01:06 +02:00
Uwe Bonnes e1a928beb1 Fixes to compile with gcc11 #925
Target code changes are pure for formal correctness and not tested!
2021-10-10 15:59:57 +02:00
Uwe Bonnes b076d5cea1 stm32f1: Check if unlock failed and propagate error. 2021-09-22 21:41:43 +02:00
Uwe Bonnes 554e34517e Better reporting when monitor command fails. 2021-09-22 21:41:43 +02:00
Uwe Bonnes 9e98cfa220 adiv5: Remove leftover debug output. 2021-09-22 21:41:43 +02:00
Uwe Bonnes 9ebc44bcea Make more functions static. 2021-09-22 15:16:20 +02:00
Uwe Bonnes 9de69bb3ab Adiv5/Initial halt: More fixes for dd28fa5743. #925
Stlink does not like low level access and aborts with STLINK_SWD_DP_ERROR.
Either our implementation still has faults or stlink can not handle

MINDP devices with BMP/Firmware also seemm not to like low level access,
either du to some hidden error in BMP or by design
2021-09-22 15:16:20 +02:00
Uwe Bonnes a9854e9b37 adiv5: Fix the MINDP case introduced with dd28fa5743 #925 2021-09-16 12:39:26 +02:00
dpc f66caa0d29 add some more nxp s32k14x variants
the sdid bits correspond to s32k14x as well as s32k11x but i only have
access to the k14x variants so didn't bother w/ the k11x variants.
the memory/flash sizes also can come from the sdid bits, but the
splits still need to come from a lookup.
2021-09-13 23:01:05 +02:00
dpc 95288bcf75 fix a size format warning 2021-09-13 23:01:05 +02:00
Uwe Bonnes dd28fa5743 adiv5: Tighten up loop to initial halt cortexm
Use TRNCNT when available.

Now the F767 with the NutOS 300 ms sleep example  with the one ms tick is
halted even in hosted after few ms.
2021-09-04 21:15:07 +02:00
Uwe Bonnes 863a41daac adiv5_swdp: Initialize initial_dp with the definition 2021-08-15 16:43:29 +02:00
Uwe Bonnes 6308506276 jtag: Make jtag_devs argument to jtag_handler. 2021-08-15 16:43:29 +02:00
Uwe Bonnes 6dff2a9f31 target: target_error_check now defaults to not indicate error.
Remove unneeded nop_function from efm32
2021-08-15 16:43:29 +02:00
Uwe Bonnes 3df692ecb2 adiv5_swdp_scan: If SWD scan fails, try a JTAG scan. 2021-08-15 16:43:29 +02:00
Uwe Bonnes 2d4a503135 jtag_scan: Rework chain detection
Fixme: stlinkv2/hosted probably does only handle STM devices. Check if
jtag_devs.c really needed.
2021-08-15 16:43:29 +02:00
Uwe Bonnes 1845d71f00 jtag_scan: Deliver full idcode to the handler. 2021-08-15 16:43:29 +02:00
Thiadmer Riemersma c7bc4b6a5d Bug fix in Flash erase function for LPC MCUs. 2021-08-13 16:18:53 +02:00
Thiadmer Riemersma 72bd825a60 Add support for NXP LPC11xx XL series, add 'readuid' command for some MCUs of the LPC11xx series where it was missing; add comments mapping Device IDs to part descriptions. 2021-07-31 16:08:34 +02:00
Uwe Bonnes 0c63903071 adiv5: Recover from bad AP access.
E.g. AP1 on a STM32WLE5 points to a ROM table, but access to the ROM table
via AP1 hangs forever.
- Substantial reduce timeout when wait for a response. Valid access should
  succeed fast.
- Abort AP access to free DP for other accesses
- Don't throw exception, only set dp->fault
- React on higher level
2021-07-15 15:06:54 +02:00
Björn Mellström 5ea01030e2 Add nRF51 command for (only) erasing the UICR registers
Original implementation by: Benjamin Vedder <benjamin@vedder.se>
2021-06-07 13:50:36 +02:00
Björn Mellström 4b8c4990dc Fix warning about unused variable in adiv5.c
This happens if the platform has debugging support but debugging
is not enabled.
2021-06-03 12:56:41 +02:00
Björn Mellström 711a87f7ba Fix some warnings when compiling with -Wshadow
There are still a few more places that would need to be corrected
before -Wshadow could be added by default.
2021-06-03 12:55:28 +02:00
Uwe Bonnes 891633322a lpc: Care for protected pages on LPC80x devices. 2021-06-01 16:23:19 +02:00
Uwe Bonnes f7b4697280 lpc11xx/lpc8c04: Do not expose two top system flash sectors. 2021-06-01 16:23:19 +02:00
Uwe Bonnes 42ebcac329 efm32_devices: Rearrange struct efm32_device_t to save flash space. 2021-06-01 16:23:19 +02:00
Uwe Bonnes 21a702dc1e lpc: More verbosity and more definitions 2021-06-01 16:23:19 +02:00
Uwe Bonnes 87acd99fe4 cortexm: For Cortex-M0+ devices, probe also for lpc11 to detect LPC80 #884 2021-05-18 12:24:00 +02:00
Uwe Bonnes 517d5b5b31 rp: Show spinner only when called from monitor command. 2021-05-16 11:26:14 +02:00
James Turton 0ab10fee0b rp: Increase timeout for flash_range_program
If the RP2040 is using the ring oscilator (ROSC) rather than the crystal
oscilator (XOSC) then flashing program will take much longer. As the XOSC is not
enabled at boot we should not assume it will be enabled before the debugger is
connected (or indeed at all), thus should use the longer timeout during load
commands.
2021-05-16 11:26:14 +02:00
James Turton ff30259354 rp: Add more debug logging during flash 2021-05-16 11:26:14 +02:00
James Turton e453740aca rp: Increase spinner timeout to 500ms
Increasing spinner timeout to 500 means `tc_printf` is not called during
the `_flash_range_erase`. This is important as `_flash_range_erase` is
used when loading. This fixes the issue:
https://github.com/blacksphere/blackmagic/issues/875
Also adding spinner timeout counter to reduce bus traffic.
2021-05-16 11:26:14 +02:00
James Turton 67c9003522 rp: Flush cache after erase and write
The RP2040 datasheet suggests that _flash_flush_cache and _flash_enter_cmd_xip
should be called after erasing and writing to flash.
2021-05-16 11:26:14 +02:00
James Turton f880734050 Fix compiling for native probe 2021-05-16 11:26:14 +02:00