The implementation used to always check F_Cu and B_Cu, rather than
where the via started and ended (which will be different for blind/
buried vias and microvias).
1) The highest priority zone that a via/pad collides with "owns" its
connectivity state. Once set, lower priority zones cannot change it --
and in fact, if they would have connected to it are forced not to.
2) The connectivity state goes with the zone fill state, and therefore
must be saved in the file.
3) Display of remove-unconnected's pads is no longer done in GetViewLOD()
(which isn't called for selected items), and is instead done in PCB_PAINTER.
This allows us to draw the full pad in outline mode when a via/pad is
selected which would otherwise only show the hole.
4) Note that in some cases this will still generate DRC errors -- in
particular when a via nearly collides with a higher priority zone it
won't get "owned" by that zone and may therefore have insufficient
clearance if said zone concludes it's unconnected and a subsequent
(lower priority) zone connects to it (causing it to now become flashed).
Fixes https://gitlab.com/kicad/code/kicad/issues/11299
Apparently mapping Eagle footprint layers to the KiCad Dwg_User
that were previously mapped to UNDEFINED_LAYER breaks the QA test
and causes the footprint editor to crash when opening Eagle
footprints. This means that the potential data loss issue when
loading Eagle footprints is still in play.
The Eagle plugin layers have to be mapped differently depending on
whether a board is being imported or a footprint library is being
cached. Footprint libraries can bypass the manual layer remapping
step that happens when importing a board.
Please note that when loading footprints in the footprint editor
and viewer, all layers that do not directly map to KiCad layers are
put on the Dwg_User layer so that there is data loss. Users will
have to manually remap objects to the correct layer as required.
This is less than ideal but until the footprint library table parser
supports prompting users to remap unknown layers, it will have to do.
Fixes: https://gitlab.com/kicad/code/kicad/-/issues/11839
Each pad group is allowed to short nets with other pads in its group.
Legacy footprints with the "net tie" keyword hack will get a single
group auto-created with all the footprint's pads in it.
DRC and the router now allow a track to collide with copper graphic items
while entering a net-tie pad as long as the closest point in the collision
is within the pad.
DRC (and the footprint checker) now check for copper items in the
footprint shorting pads which are not in the same pad group.
Fixes https://gitlab.com/kicad/code/kicad/issues/2265
Pads with zero width or height cause issues when rendering and
selecting. KiCad has never allowed these elements but hasn't prevented
importing systems where they exist. This prevents their import and
cleans existing designs where the pads are placed
Fixes https://gitlab.com/kicad/code/kicad/issues/12200
1) Move a bunch of std::map's to std::unordered_map to get constant-time
look-ups
2) Lengthen progress-reporting intervals to spend more time doing work
and less time talking about it
3) Reverse order of SHAPE_LINE_CHAINs in thermal intersection checks to
make (much) better use of bbox caches
4) Don't re-generate bboxes we already have
5) Fix some autos that weren't by reference (and were therefore copying
large datasets)
6) Rename delta progressDelta so it's easier to search for in future
7) Get rid of a few more autos (because I don't like them)
8) Pass large items to lambdas by reference
Fixes https://gitlab.com/kicad/code/kicad/issues/12130
Removes a nanny setting that prevented the use of
blind/buried/micro-vias without a checkbox. If the designer does not
want microvias in their board, they simply do not place microvias.
Found via `codespell -q 3 -S *.po,./thirdparty,./Documentation/changelogs -L aactual,acount,aline,alocation,alog,anormal,anumber,aother,apoints,aparent,aray,ba,busses,dout,einstance,leaded,modul,ontext,ot,overide,serie,te,,tesselate,tesselator,tht`
Better fix for 11750. Instead of figeting with layer values, we sort
our map based on the layer numbers in the PCAD file. F_Cu is always
layer 1 and B_Cu is always layer 2.
Fixes https://gitlab.com/kicad/code/kicad/issues/11750
According to the PCAD specification, all tags are case insensitive.
Most exporters honor the defaults but there is always an outlier or two
Fixes https://gitlab.com/kicad/code/kicad/issues/11652
the new attribute is:
"(attr (teardrop type padvia)))" or "(attr (teardrop (type track_end)))"
However (Work in Progress) writing this attribute in file is temporarily disabled.
1) Import leaders
2) Drop radius and angle dimensions
3) Import dimension text sizes
4) Correctly interpret which side dimension offset is on
5) Correclty handle offsets for non-cardinal dimensions
Fixes https://gitlab.com/kicad/code/kicad/issues/10763
Also fixes two bugs:
1) subsequent text items that are marked >NAME or >VALUE will now get
imported as text items with ${REFERENCE} or ${VALUE} (instead of overwriting
the previous text item)
2) we no longer (accidentally) capitalize all text items.
Fixes https://gitlab.com/kicad/code/kicad/issues/11321
When importing a eagle board file using wxXmlDocument, the strings in eagle BOARD
(UTF8 encoded) are correctly converted to wxString (using unicode wide chars)
So trying to reconvert these strings using FROM_UTF8( <wxString>.c_str() )
is incorrect and can break initial string if non ASCII7 chars are found
ADDED: Any addition board layers can be plotted on all selected board layer
when plotting.
CHANGED: The new plot to all layers feature made the plot edge cuts option
obsolete. Users must now select the edge cuts layer from the list of
plot to all layer selections to include edge cuts on all layers when
plotting.
Fixes https://gitlab.com/kicad/code/kicad/-/issues/2449
Bugs found but not fixed yet:
* Reference and Value are not converted correctly yet
* HOTFIX: test commented out
* GP3906-TLP and UBLOX_ZOE_M8-0-10 are not able to import the description again
* HOTFIX: description removed from gold file
KiCad has stricter requirements for what consititutes an annotated
symbol. This checks for and corrects annotations that begin with '#',
do not begin with a non-numeric character or do not end with a number
* Add test-code for pads
* Move test-code into board_test_utils.cpp for reuse, one method per object
* Add a real (rather small) Altium footprint for testing purposes
The test simply loads every footprint of a library, and compares all elements with an equivalent
KiCad footprint. This allows us to quickly spot regressions in the altium and kicad footprint importer,
and any code in-between. This test is only a demo, as the checks are still incomplete and quite a few
tests are missing.
It has to be noted that mask expansion is not supported rigt now by the altium importer, thus the
reference footprint is adjusted to keep the test happy.
gcc doesn't need it and computes during compile regardless, but experimenting in godbolt, both clang and MSVC actually do need it or else it's partially computed at runtime
It would be nice to not use the workaround with PCB_SHAPE, but better than creating wrong geometries in the first place. This should be improved when I'm more in the mood to think about geometric.
It was possible that we confuse multiple files with the same name. This should not be that relevant for board and schematic import, but is important for library import!
1) Unify metrics between stroke and outline fonts
2) Unify handling of rotation and mirroring
3) Bug fixes in collision handling
4) Use of VECTOR2I (instead of VECTOR2D) for world-coordinates
5) Generate outline font overbar with rounded ends and fix rotation
bugs
6) Generate wxEVT_CHOICE events from FONT_CHOICE::SetFontSelection
7) Change text-item PNS SOLIDs to use compound shapes
ADDED zone_connection constraint.
ADDED thermal_relief_gap and thermal_spoke_width constraints.
ADDED angle override for thermal relief spokes in Pad Properties.
Fixes https://gitlab.com/kicad/code/kicad/issues/4067
ADDED arc, circle and rectangle shapes for schematic. Shapes support
line styles and fill colors.
CHANGED sheet background color in Edit Text & Graphics Properties to
fill color (and it now affects shapes).
Pushed STROKE_PARAMS down into common and moved all shapes to using it
for stroke descriptions.
KiCad breaks a bit when dealing with 360° arcs, so convert them to
circles on import. The break happens when converting to polygons for
viewing, the arc is passed from start->mid->end format to
center->start->angle format. At 360°, the angle is normalized to 0
The previously used line number threshold was causing (on some systems) severe slowdown in loading
due to relatively long redraw time of the progress bar window.
Symbol library IDs included the library nickname which is incorrect
and meaningless since it will be overwritten by the symbol library
table code. This is not a file format change as there are no behavioral
differences.
If the THROUGH_HOLE attribute isn't set, it just means that the pads
are only present on one side of the board, but there can still be a
plated / non-plated hole.
Fixes https://gitlab.com/kicad/code/kicad/-/issues/9579
When importing, we should not use Eco1 for other purposes as the
importer uses it to place unknown layer objects. We also need to avoid
placing objects on the courtyard layers that do not relate to the layer
purpose in DRC
Fixes https://gitlab.com/kicad/code/kicad/issues/9442
We no longer have any knowledge of the original start/end of the arc,
since SetArcAngleAndEnd swaps the start and end to ensure the arc is
always clockwise at the end.
Adds a method EDA_SHAPE::EndsSwapped() to notify whether the start/end
point of the shape were swapped.
The final netclass name will be a bit long but it will allow for custom
DRC rules to individually target each of the three properties available
in CADSTAR:
- Route Code (which specifies width of the track in min, max, opt)
- Net class (only used in signal integrity analysis)
- Spacing class (for specifying clearance requirements between classes)
Testing suggests that CADSTAR doesn't actually have any clearance to the
hole (other than electrical clearance to the barrel of the padstack/
viastack).
This removes a large amount of DRC violations on imported designs.
Use KiCad default stackup for older CADSTAR boards that do not
define any dielectric layers between the electrical layers.
Also fix default stackup calculation to ensure finished board thickness
is 1.6mm
This was happening in two cases:
- Loading documentation symbols (CADSTAR on purpose defines these in an
invalid layer)
- When an item was in a "layer set" such as ALLELEC or ALLLAYER - need to
make sure we remove the copper layers that are not active in the design
Cadstar areas have a line width but this is only for display purposes.
Instead CADSTAR uses the center line when determining whether a DRC
violation occurred.
We were loading as solid fill when the relief gap was exactly the
same as the minimum width.
Also we can do better than just load as solid fill when it is smaller:
we can instead just use the minimum width and at least it still will
have thermal reliefs.
Marek Roszko
Jeff Young
Seth Hillbrand
Jon Evans
Roberto Fernandez Bautista
Wayne Stambaugh
jean-pierre charras
Mike Williams
luz paz
Thomas Pointhuber
Steffen Mauch
Frank Zeeman
Ola Rinta-Koski
Simon Richter
Tomasz Wlostowski
david-beinder