Commit Graph

59 Commits

Author SHA1 Message Date
Jeff Young 4cd48cd5c9 Fix some test issues. 2022-04-23 22:15:39 +01:00
Jeff Young 2663ad5340 Implement Eagle text variables.
Also fixes two bugs:
1) subsequent text items that are marked >NAME or >VALUE will now get
imported as text items with ${REFERENCE} or ${VALUE} (instead of overwriting
the previous text item)

2) we no longer (accidentally) capitalize all text items.

Fixes https://gitlab.com/kicad/code/kicad/issues/11321
2022-04-10 17:29:47 +01:00
jean-pierre charras 5e52539939 eagle importer: fix incorrect conversion UTF8/wxString.
When importing a eagle board file using wxXmlDocument, the strings in eagle BOARD
(UTF8 encoded) are correctly converted to wxString (using unicode wide chars)
So trying to reconvert these strings using FROM_UTF8( <wxString>.c_str() )
is incorrect and can break initial string if non ASCII7 chars are found
2022-04-09 15:33:01 +02:00
Thomas Pointhuber bd18e340f4 eagle: introduce *.lbr footprint import test
Bugs found but not fixed yet:
* Reference and Value are not converted correctly yet
  * HOTFIX: test commented out
* GP3906-TLP and UBLOX_ZOE_M8-0-10 are not able to import the description again
  * HOTFIX: description removed from gold file
2022-04-02 20:07:16 +02:00
Thomas Pointhuber 056748e0df altium: Add testcase to verify that "PCB Binary Version 5.0" is also supported 2022-04-02 18:17:19 +02:00
Thomas Pointhuber 406c528ab7 altium: Create region for items on the KEEP_OUT_LAYER and use new Track unit-tests 2022-04-02 18:17:19 +02:00
Sylwester Kocjan 3da47e6123 qa: move pcbnew data to appropriate directory 2022-03-30 11:13:23 +00:00
Sylwester Kocjan cfb8fbc644 qa: move eeschema data to appropriate directory 2022-03-30 11:13:23 +00:00
jean-pierre charras f3be3a5762 test: update test files to fix DRC issues after changing the text position algo. 2022-03-30 10:56:16 +02:00
jean-pierre charras 93066004f1 QA: fix altium qa tests now the altium to pcbnew coordiantes are rounded
to the near 10nm value.
2022-03-24 12:36:46 +01:00
Jeff Young d65019e280 Update tests. 2022-03-15 00:37:44 +00:00
Thomas Pointhuber 1831ae6fa4 altium: Fix test due to keepout restrictions parse changes 2022-03-12 09:59:57 +01:00
jean-pierre charras 4ad89b9c04 Fix qa tests after fix made in commit 878c70c1 2022-03-09 17:18:54 +01:00
Thomas Pointhuber a9ebb42ecd altium: Parse keepout restrictions of tracks 2022-03-07 19:58:43 +01:00
Seth Hillbrand 9d927f3135 Check for additional connections between tracks
Prevents removal when a track is connected not just to other tracks but
also other connected items

Fixes https://gitlab.com/kicad/code/kicad/issues/10916
2022-03-03 12:07:20 -08:00
Thomas Pointhuber 52a2d52bf0 altium: Parse solder and paste mask settings of tracks and arcs 2022-02-20 20:18:40 +01:00
Thomas Pointhuber 86c025eb30 altium: Fix parsing of zones which use the KEEP_OUT_LAYER 2022-02-19 14:37:05 +01:00
Seth Hillbrand a19d9105f0 Fix SolderBridge check to only check across multiple
We should not generate an error when overlapping a single copper element
with a soldermask that is not associated with copper.

Fixes https://gitlab.com/kicad/code/kicad/issues/10906
2022-02-18 11:47:28 -08:00
Thomas Pointhuber 81b4229e12 altium: Improve test-coverage of *.PcbLib import functionality
* Add test-code for pads
* Move test-code into board_test_utils.cpp for reuse, one method per object
* Add a real (rather small) Altium footprint for testing purposes
2022-02-12 16:50:25 +01:00
Thomas Pointhuber 3f36e7d725 altium: Start with a test-suite to validate that *.PcbLib footprints are correctly imported
The test simply loads every footprint of a library, and compares all elements with an equivalent
KiCad footprint. This allows us to quickly spot regressions in the altium and kicad footprint importer,
and any code in-between. This test is only a demo, as the checks are still incomplete and quite a few
tests are missing.

It has to be noted that mask expansion is not supported rigt now by the altium importer, thus the
reference footprint is adjusted to keep the test happy.
2022-02-09 22:34:04 +01:00
Marek Roszko 28ce11212c Emplace_back a bit a in clipper 2022-02-05 21:00:34 -05:00
Ola Rinta-Koski 9b406c1da4 Outline font support. 2022-01-08 16:47:45 +00:00
Marek Roszko 367431f825 Update solder_mask_bridge_test.kicad_pro to ignore library mismatches in test 2022-01-02 19:18:29 -05:00
Jeff Young 5f37c2b247 Custom rule severities.
ADDED severity token to custom rule syntax.  Each rule can now define
its own severity.

Fixes https://gitlab.com/kicad/code/kicad/issues/6148
2021-12-24 15:42:22 +00:00
Jeff Young 3aa6d73770 Allow min/max/opt to come from different rules. 2021-12-24 12:36:37 +00:00
Jeff Young 4b6f2f0658 Add mechanical copper clearance testing for shapes.
Also includes going from distance-based neighbor exclusion to angle-
based.  (Distance doesn't work when very short segments are followed
by very long ones.)

Fixes https://gitlab.com/kicad/code/kicad/issues/2512
2021-12-24 11:40:10 +00:00
Jeff Young a48867ea01 Solder mask integrity testing.
ADDED DRC test for solder mask aperture bridging copper from different
nets.
ADDED visualization of minimum web width processing for solder masks.
ADDED allow_soldermask_bridges property for footprints.

Fixes https://gitlab.com/kicad/code/kicad/issues/2183

Fixes https://gitlab.com/kicad/code/kicad/issues/1792
2021-12-23 22:31:14 +00:00
Jeff Young a1e3f2b188 Starved thermals DRC checking.
ADDED min_resolved_spokes constraint.
ADDED "Thermal relief connection to zone incomplete" violation.

Fixes https://gitlab.com/kicad/code/kicad/issues/2183
2021-12-23 22:30:42 +00:00
Jeff Young 32721755bf Hook up zone-pad connections to custom rules.
ADDED zone_connection constraint.
ADDED thermal_relief_gap and thermal_spoke_width constraints.

ADDED angle override for thermal relief spokes in Pad Properties.

Fixes https://gitlab.com/kicad/code/kicad/issues/4067
2021-12-23 22:30:26 +00:00
Jeff Young 0a609dd48d Add footprint library checking to DRC.
Fixes https://gitlab.com/kicad/code/kicad/issues/6821
2021-12-23 19:18:45 +00:00
Mikolaj Wielgus e1cc7cfbe0 Change wire width from 5 mils back to 6 mils
These were remnants of https://gitlab.com/kicad/code/kicad/-/issues/7865
2021-11-07 14:32:27 +00:00
Jeff Young a397e85589 Implement PTH/NPTH/courtyard collision tests.
Fixes https://gitlab.com/kicad/code/kicad/issues/9081
2021-09-04 00:16:26 +01:00
Jeff Young 1e23ce1c95 Pull some fixes back from 7.0.
1) An earlier 6.0 fix to apply pad clearance overrides to NPTH pads
got broken, so this replaces it.

2) Allow min/max/opt to be set by different rules.

3) Fixes a bug where board minimum enforcement over a local override
didn't get the right message text.
2021-08-21 16:43:11 +01:00
Jeff Young a208dac8d8 Convert hole clearance tests from NPTH holes to all holes. 2021-08-09 22:26:00 +01:00
Jeff Young c00f4ed5d2 Add regression tests for track cleaner. 2021-08-03 16:17:18 +01:00
Jeff Young 43523df843 Measure distance from pad center, not pad hull.
Otherwise we think the wrong end of really short track segments is
connected to the pad, leaving the other end dangling.

Fixes https://gitlab.com/kicad/code/kicad/issues/8909
2021-08-02 22:42:54 +01:00
Jeff Young 2a2dc1c0ff Fix false test failures. 2021-08-01 22:18:18 +01:00
Jeff Young faa1ff4ec6 Add false-negative DRC tests (and fix first bug found by them). 2021-07-31 16:41:44 +01:00
Jeff Young 8d6cd4ad99 Add a bunch more zone fill and DRC regression tests.
Also tries to fix a compile issue on gcc.
2021-07-30 21:15:21 +01:00
Jeff Young 8c69a856fc Add zone filler tests.
One test has pads of a bunch of different shapes and provokes some
errors to make sure they're caught.

The others are all past issues with the zone filler to make sure we
don't suffer any regressions.  (They should all just pass with no DRC
errors.)
2021-07-30 17:09:24 +01:00
qu1ck cc6df515a1 Make ARCs accessible from python 2021-03-01 17:34:47 +00:00
Jon Evans a8ef81aef1 Don't track project local settings in this repo 2021-02-21 20:30:57 -05:00
qu1ck 5c3ee0443c Make footprint properties accessible from python
Now that footprint properties inherit custom fields from schematic
they are very useful.

Setting custom properties from python will also be handy in plugins
that need to somehow mark their own objects.
2021-02-05 02:31:48 +00:00
Seth Hillbrand 8778599c0d Apply same nettie hack to zone filler
The nettie hack is used in DRC but we also need to use it in zone filler
to allow zones to be used with netties.  We limit this to the
appropriate nets in the nettie

Fixes https://gitlab.com/kicad/code/kicad/issues/7351
2021-01-31 16:16:48 -08:00
Jon Evans b90e72ed07 Don't simplify hierarchical nets based on weak drivers
This behavior provided shorter net names, but was confusing if
the user gives an explicit strong driver in the subsheet but not
one in the parent sheet.

Testcases updated for net name changes; connectivity is the same

Fixes https://gitlab.com/kicad/code/kicad/-/issues/4201
2021-01-13 22:10:56 -05:00
Wayne Stambaugh 60ebd177fd Header clean up round 5. 2020-12-21 18:42:21 -05:00
Jon Evans a900fb319d Add testcase for bus junctions problem 2020-10-27 23:02:49 -04:00
Jon Evans 76bfa47a77 Allow creating new projects when doing a Save As in eeschema 2020-10-05 22:36:26 -04:00
Seth Hillbrand 856cf51fc8 Fix typo 2020-09-23 14:00:39 -07:00
Wayne Stambaugh d45c11b4b5 Exclude from bill of materials and board netlist to library symbols.
ADDED: Support for exclude from bill of materials and board netlist to
library symbols.

Fixes https://gitlab.com/kicad/code/kicad/issues/4915
2020-09-09 09:03:37 -04:00