When checking the physical clearance on a layer, it is critical to check
that the via hole exists on that layer. Blind/buried and micro vias may
not overlap, so should be excluded from this check when they don't exist
on a particular layer
Similarly, we should only be reporting a single physical clearance error
for each item pair even though they may have multiple errors across
multiple layers in the case of via-via clearance
Nominally, the zcode of a vertex is unique. This is not 100% true,
however, as we must interlace two 32-bit numbers into a single 32-bit
number. Sorting needs to account for the possibility that the zcode
will be the same while other elements of the vertex are different. This
commit fixes the broken boolean logic to more clearly handle these cases
Fixes https://gitlab.com/kicad/code/kicad/issues/13867
1) Special case doesn't work for polygons with holes
2) Fix special case to handle intersecting lines where neither end is
in the polygon.
Note that only (1) is required for the bug below. (2) was just
discovered while implementing (1).
Fixes https://gitlab.com/kicad/code/kicad/issues/13779
When we have objects spanning multiple layers, the user doesn't need to
see every layer/hole combination violation if they do not request it
(cherry picked from commit c07043e762)
The hard coded value was too small for certain calculations. Better to
have a configurable value that is initially set to our error level to
allow for deviations that don't meet the visibility test for spikes.
These have become more apparent with Clipper2
The connection width checker uses morton codes to order elements. The
sort should be primarily morton-based but needs to be stable in order to
ensure that nextZ/prevZ elements are properly placed as the actual
next/prev elements in the list. Otherwise, hitting a fracture point
might make us skip in the wrong direction
Fixes https://gitlab.com/kicad/code/kicad/issues/12831
This is done under the same conditions as track-to-copper-graphic --
the pad or track must also collide with a net-tie pad, and the pad or
track to copper-graphic collision must be within the boundary of said
pad.
Fixes https://gitlab.com/kicad/code/kicad/issues/13008
pad of a given number.
Also improves other DRC logic to tighten up the net-tie rules now that
we know which pads are allowed to short with which other pads.
Also removes the "Overlapping pads" DRC violation now that we know
whether or not overlapping pads in a net-tie footprint constitute a
short.
Fixes https://gitlab.com/kicad/code/kicad/issues/12506
When the via is first and not second in our ordering, the hole-copper
clearance was not checked as the track did not have a hole.
We also calculated the NPTH-via clearance incorrectly in the inspector
The hash table for integer hashes is extremely limited and places most
elements in the same buckets. This leads to a linear search time for
structures built on this.
This blocks hashes, directing the coder to utilize std::set or std::map
structures instead of hash tables for implementing integer-based
lookups.
Each pad group is allowed to short nets with other pads in its group.
Legacy footprints with the "net tie" keyword hack will get a single
group auto-created with all the footprint's pads in it.
DRC and the router now allow a track to collide with copper graphic items
while entering a net-tie pad as long as the closest point in the collision
is within the pad.
DRC (and the footprint checker) now check for copper items in the
footprint shorting pads which are not in the same pad group.
Fixes https://gitlab.com/kicad/code/kicad/issues/2265
Unconnected items and schematic partity violations are also now
represented by markers, so the ERC/DRC window itself needs to do
the deep-delete.
Fixes https://gitlab.com/kicad/code/kicad/issues/12182
1) Move a bunch of std::map's to std::unordered_map to get constant-time
look-ups
2) Lengthen progress-reporting intervals to spend more time doing work
and less time talking about it
3) Reverse order of SHAPE_LINE_CHAINs in thermal intersection checks to
make (much) better use of bbox caches
4) Don't re-generate bboxes we already have
5) Fix some autos that weren't by reference (and were therefore copying
large datasets)
6) Rename delta progressDelta so it's easier to search for in future
7) Get rid of a few more autos (because I don't like them)
8) Pass large items to lambdas by reference
Fixes https://gitlab.com/kicad/code/kicad/issues/12130
Since we aren't searching zones (they aren't in the m_CopperItemRTreeCache)
this will drop all errors that are zone-only (which are better handled by
zone-min-width).
1) For solder mask apertures report both the aperture and both
exposed items.
2) Don't process solder mask apertures in footprints with the
"bridging allowed" flag set.
Fixes https://gitlab.com/kicad/code/kicad/issues/12064
In addition to showing resolved clearance, we also show the calculated
clearance in the same method as is used for DRC. This will allow users
to better examine their system while working.
Fixes https://gitlab.com/kicad/code/kicad/issues/7934
Removes a nanny setting that prevented the use of
blind/buried/micro-vias without a checkbox. If the designer does not
want microvias in their board, they simply do not place microvias.
Found via `codespell -q 3 -S *.po,./thirdparty,./Documentation/changelogs -L aactual,acount,aline,alocation,alog,anormal,anumber,aother,apoints,aparent,aray,ba,busses,dout,einstance,leaded,modul,ontext,ot,overide,serie,te,,tesselate,tesselator,tht`
Thread pools are long-lasting executors that have close to zero overhead
when launching new jobs. This is advantageous over creating new threads
as we can use this for threading smalling jobs and smaller quanta. It
also avoids the heuristics needed to determine the optimal number of
threads to spawn
Threaded DRC access will write to this string, re-allocating the memory
without any synchronization between threads using the string. Comment
adding this listed performance as a reason for using shared strings.
Measured performance does not seem noticeably different in either case,
even with high-error count boards. If there is a case where the
performance is limiting, we can replace these wxStrings with
std::wstring and utilize fmt
Fixes https://gitlab.com/kicad/code/kicad/issues/9888
Removes some duplicated terms; puts in some more headers to make
visual parsing easier, and makes non-connected-pads report the correct
data.
Also fixes a bug where zone-connection overrides of none weren't getting
handled correctly.
Fixes https://gitlab.com/kicad/code/kicad/issues/11544
ApproximatelyParallel will only check for parallel within 1 IU, so a 1x1
SEG will always be parallel and the projection is invalid
(cherry picked from commit d0796399a2)
The basic problem is that the DRC engine does length testing and skew
testing by collecting all the diff pair constituent parts and pairing them
itself. Since each part is collected on its own, we need to ignore the
'B' unit when evaluating any conditional expressions. However, doing this
in general means that when evaluating "OwnClearance()" we also ignore the
'B' unit and return the diff pair CLEARANCE_CONSTRAINT when we shouldn't.
This implements a more discerning test which know what the current requested
constraint is when evaluating expressions.
See also https://forum.kicad.info/t/solved-custom-differencing-rule-not-working-drc/34034/6
Fixes https://gitlab.com/kicad/code/kicad/issues/11314
Jeff Young
Seth Hillbrand
Jon Evans
jean-pierre charras
Alex
Wayne Stambaugh
Marek Roszko
luz paz