Seth Hillbrand
bcf6b620a8
Large rework of BEZIER_POLY
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Add direct handling of quadratic beziers to save compute time and number
of points. Update cubic interpolation to reduce number of points
generated for a given smoothness
Cache data on open and used cached data to avoid multiple re-calcs
Remove minimum line length and number of segments and replace with
standard max error level. Allows us to specify the tolerance of bezier
interpolation
2024-06-18 17:55:41 -07:00
Seth Hillbrand
3e16359b4f
Update golden master for Altium import
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The altium footprint being imported has vias that were ignored before,
so now we need to have the correct golden master with vias
2024-06-14 17:41:44 -07:00
Jon Evans
5fc0f1f51e
ADDED: Independent control of front/back via tenting
2024-06-11 21:50:25 -04:00
Jon Evans
4aab9f59aa
ADDED: Support tenting control of individual vias
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REMOVED: Tenting option from plot dialog (tenting is now
controlled from Board Setup and via properties)
See https://gitlab.com/kicad/code/kicad/-/issues/2402
2024-06-11 21:25:02 -04:00
Jeff Young
aa1fb0604a
Fix KeepUpright settings in Eagle gold files.
2024-06-09 23:38:54 +01:00
Alex Shvartzkop
ee8b74d688
QA: update golden data for Altium "Tracks" PcbLib.
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(cherry picked from commit c6b483acb9
)
2024-06-09 23:03:33 +03:00
Jon Evans
f5e7c705db
Move custom shapes to PADSTACK; support in API
2024-06-08 14:26:36 -04:00
Jon Evans
0b0a37aaf7
Move padstack serialization to PADSTACK
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Also move a few more things from pad/via
2024-06-04 09:28:24 -04:00
Jeff Young
855c972156
Add regression test and example rule.
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Fixes https://gitlab.com/kicad/code/kicad/-/issues/18142
2024-06-04 10:58:52 +01:00
Seth Hillbrand
75ab3d9e8b
Handle arcs dp coupling
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Calculate coupled arcs and spacing
Fixes https://gitlab.com/kicad/code/kicad/-/issues/17967
2024-05-30 16:11:12 -07:00
dsa-t
16f3237983
QA: update Altium footprint library golden file.
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(cherry picked from commit dd2f15c96d
)
Co-authored-by: Alex Shvartzkop <dudesuchamazing@gmail.com>
2024-04-27 20:35:00 +00:00
Seth Hillbrand
f61d400d88
Allow non-identical schematic/pcb nets
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The schematic net names are fully unique but if we have multiple pads
that are mapped to a NC pin, they need to have unique net names so that
they do not get connected to each other in the ratsnest. This breaks
the schematic parity check as we have modified the netname for some
pads. To work around this, we first maintain the zero-th net without
suffix and then add an additional check in DRC to ensure that we allow
unconnected nets as long as the share a common prefix with the schematic
netname.
2024-04-15 17:54:44 -07:00
Jon Evans
1dbe78c68b
Add QA tests and expand serialization for API
2024-04-02 19:51:18 -04:00
Seth Hillbrand
553e4a25bf
Tidy up some remaining triangulation cases
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Found and fixed a few corner cases where triangulation point removal
could reset expected points
2024-04-01 11:48:12 -07:00
Seth Hillbrand
c3f6a84d66
Update triangulation to handle poly-intersection
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Polygon intersections happen against the original outline, not against
the currently remaining polygon. This avoids pathalogical cases
Adds new simplification system to avoid duplicated points
Adds new edge-splitting algorithm to provide additional fall-back
Verifies that polygon cuts do not swap holes for outlines (negative
area)
Fixes https://gitlab.com/kicad/code/kicad/-/issues/17559
2024-03-28 10:16:24 -07:00
Seth Hillbrand
6b915049d1
Check singular arcs connection
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Even if there are no other segments in the line chain, we still should
check for arc connections in cases of individual arcs on a line chain
2024-03-22 10:41:42 -07:00
Mike Williams
543343b7d1
prettifier: add newlines to golden samples
2024-03-18 16:03:09 -04:00
Jon Evans
96ea1f6f89
Revert change to prettifier QA data
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The file format should not be bumped in these test cases, they are not a test of the file format writer.
2024-02-25 12:50:44 -05:00
Jeff Young
ee3be0802c
Move PCBNew overrides to nullable properties.
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Fixes https://gitlab.com/kicad/code/kicad/-/issues/5562
2024-02-24 20:05:51 +00:00
Jeff Young
27c253780d
Separate out Pad_Shape so auto-complete can work.
2024-01-10 19:22:05 +00:00
Jon Evans
104aa1abe4
Change prettifier QA to not depend on file format changes
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Instead of writing out and reading back in using the plugin,
just test the formatter itself.
Also add support for testing full boards.
2024-01-01 13:38:16 -05:00
jean-pierre charras
58b7eda47a
QA test( test_prettifier) update golden files and fix a warning message.
2024-01-01 10:57:32 +01:00
John Beard
751c88ef20
Use 'uuid' (not 'id') in the s-expr PCB groups/generator format
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Add some regression tests to check loading of groups and generators
from various versions of the s-expr PCB format.
2023-12-31 23:09:26 +00:00
jean-pierre charras
8e647c24b4
QA test, prettifier: Update golden files to the latest version.
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Add also a warning when a golden file is too old and creates comparison error.
2023-12-16 10:49:23 +01:00
John Beard
e41f5efb03
Use modern bool style for footprint locking (locked yes)
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Add some simple tests for specific footprint load/save checks
(including round-trip stability)
2023-12-14 21:22:59 +00:00
John Beard
481fa1f959
Allow PCB reference image locking and UUID to be saved
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Add some unit tests for reference image saving/loading.
Fixes: https://gitlab.com/kicad/code/kicad/-/issues/16334
2023-12-14 21:22:59 +00:00
Jon Evans
ae66ce68b5
Update testcases for generator_version
2023-11-29 16:17:41 +00:00
Jon Evans
f1f8981395
Automatic whitespace and indentation prettification for sexpr formats
2023-11-29 16:17:41 +00:00
Seth Hillbrand
9e48b388fe
Add additional QA sliver check
2023-11-28 16:02:39 -08:00
Seth Hillbrand
75c6b0ab28
Added IPC2581 support
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IPC2581 is a modern production file exchange system. It provides
single-file data output for an entire board including BOM and netlist
information.
Fixes https://gitlab.com/kicad/code/kicad/-/issues/1954
2023-11-26 15:30:58 -08:00
Alex Shvartzkop
a6b517147e
QA: update Tracks.pretty
2023-11-06 17:16:16 +03:00
Alex Shvartzkop
6e4473855b
QA: update golden files for EAGLE SparkFun-GPS.lbr
2023-10-15 03:28:25 +03:00
Alex Shvartzkop
e6f0a3d91b
QA: add test files for EasyEDA.
2023-09-07 11:02:40 +03:00
Jeff Young
41e274684c
Make sure pads with no net get assigned Default netclass on board open.
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Fixes https://gitlab.com/kicad/code/kicad/-/issues/15562
2023-09-02 10:11:38 +01:00
Thomas Pointhuber
c2a91caacf
altium: verify that file contains "Compound File Binary Format" magic bytes, as we do not support the ASCII format
2023-08-18 14:47:08 +02:00
Jeff Young
f2a8c25084
Update Eagle gold files for spoke angle fixes.
2023-08-16 23:21:18 +01:00
Roberto Fernandez Bautista
8d5ebf5e30
QA: Add dummy board files (should fail header checks)
2023-08-15 05:26:12 +03:00
Roberto Fernandez Bautista
fb3e8ef8f1
QA: Add example P-CAD file
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Supplied by evanshultz in gitlab issue 3993
2023-08-15 05:26:12 +03:00
Roberto Fernandez Bautista
0b0c50471a
QA: Add example KiCad legacy PCB files
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legacy_demos based on commit e4fdce4a47
2023-08-15 05:26:12 +03:00
Roberto Fernandez Bautista
1c95762534
QA: Add example EAGLE PCB file - Adafruit-AHT20-PCB
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Source: https://github.com/adafruit/Adafruit-AHT20-PCB
2023-08-15 05:26:12 +03:00
Roberto Fernandez Bautista
87959a4625
QA: Add simple CADSTAR PCB file
2023-08-15 05:26:12 +03:00
Jeff Young
1cbef0157d
Avoid edge cases on very wide thermal spokes.
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Fixes https://gitlab.com/kicad/code/kicad/-/issues/15280
2023-08-04 15:38:06 +01:00
Seth Hillbrand
96a34e5b57
Consolidate Maximum clearance calculation
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We were calculating the same thing in three locations and we missed
adding the clearance from the footprints in, resulting in bad fills and
missed drc errors (see QA addition)
2023-07-26 12:55:48 -07:00
jean-pierre charras
a343cd0a24
Try to fix a QA issue (disable useless DRC tests for 2 boards)
2023-07-23 13:08:59 +02:00
Seth Hillbrand
b827073b3f
Update one more board to deal with changed default net clearance
2023-07-19 17:30:48 -07:00
Seth Hillbrand
45ed38a63b
Update qa tests to use new zone fill algo
2023-07-19 16:13:49 -07:00
Seth Hillbrand
998e749918
Move some DRC regression tests
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The RegressionZoneFillTests handle issues that are resolved by the zone
filler, so Clipper2 problematic fill belongs there. Otherwise, the
remaining tests should not refill the zones before running DRC because
we expect the DRC to catch errors without needing a refill
2023-07-07 11:52:25 -07:00
Seth Hillbrand
954b265839
Check for zone-zone overlap
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Instead of just checking for the zone outline, we adjust to check the
full fill area of the zones for intersection and overlaps
2023-07-07 11:52:25 -07:00
Jeff Young
dd83217062
Add DRC testing for copper graphic to zone fill collisions.
2023-06-30 14:04:20 +01:00
jean-pierre charras
86abfd2cef
Update a golden file in Eagle QA tests
2023-05-31 11:52:50 +02:00