56fb0f7766
Handle STM32F730 and STM32H750.
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Flash sector calculation was wrong with small flash sizes.
2019-02-21 19:19:10 +01:00
3f8c40d3f5
Fixing stm32l4 target to allow probing w/o halting
2019-02-21 18:06:38 +01:00
8de1b45c85
Kinetis KE04: Flash and debug support
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Support for Kinetis KE04 8KiB, 64KiB and 128KiB variants in nxpke04.c
Target monitor commands for sector and mass erase.
Changes to kinetis.c MDM-AP target to support KE04.
Only KE04Z8 tested in HW.
2019-02-17 22:48:23 +01:00
02c1934c03
Added ability to lock and unlock boot rom for samd controllers
2019-02-13 16:33:07 -08:00
0b28232f72
[efm32] Assume Device Identification (DI) version 1 if we don't know the OUI ( #402 )
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* [efm32] Assume Device Identification (DI) version 1 if we don't know the OUI
Silabs are using some additional OUIs we don't know about. Reported in issue #389
These should use a DI version 1 layout, so assume version 1 layout for OUIs we don't
know. However do print a notice about this on DEBUG() as suggested by @UweBonnes
The IDCODE value is sufficient to make a positive identification of an EFM32 device.
See AN0062 Section 2.2. Therefore accepting any OUI is reasonable behaviour.
Additionally the part familiy is checked, and the target rejected if not in the
`efm32_devices` table. This commit makes that rejection explicit, although it does
not change the logical behaviour here.
Note that the important registers (part number, part family, flash size) are at the
same addresses in both layouts anyhow. Currently only `efm32_cmd_serial` and
`efm32_cmd_efm_info` functions use registers that differ between DI versions.
* [efm32] tidy format warning about portability UB
* [efm32] Simplify OUI checking
* Only read the OUI once
* Accept the device even if the OU is unknown, as silabs have been using
a variety of OUIs
* Perform fewer register reads before checking the device family is valid
2019-01-16 09:58:59 +13:00
7cc02867ae
stm32f4: Fix problems with small flash sizes creating overflow or empty regions.
...
Thanks to "DerMeisteRR" for pointing out.
2019-01-09 12:23:49 +01:00
47fad2bf7f
Add Stm32L41x.
2019-01-09 12:23:49 +01:00
f0c6e2bbd2
Add STM32G07x.
2019-01-09 12:23:49 +01:00
0793dac2cf
libftdi: Allow to compile with mingw and cygwin and use recent libftdi1.
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Tested with x86_64-w64-mingw32-gcc-8.2.0 and cygwin gcc (GCC) 7.3.0.
Use libftdi1 unconditionally.
Try to convice github travis to use libftdi1.
Remove unportable "uint ". Thanks to jacereda for pointing out in #400 .
2019-01-07 15:31:57 +01:00
3f0c9ccee1
Fix support for LPC1115 and LPC1115XL devices ( #415 )
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* Add support for LPC11U3X devices.
The DeviceID register has a different address from the LPC11XX devices.
But it is shared with the LPC8XX family.
* Fix support for LPC1115 and LPC1115XL devices
* Fix whitespace
2019-01-07 13:34:00 +13:00
02b9d5f1ac
Add delay to cortexm_reset
2019-01-07 13:32:17 +13:00
d7e2923990
Debug on stm32f1_flash_erase errors
2019-01-07 13:32:17 +13:00
9ce05ae67b
stm32h7/f7: Store DBGMCU_CR on attach() and restore on detach().
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On STM32[FH]7, DBG_SLEEP must be set for debugging.
2019-01-07 13:22:01 +13:00
8d6092b73f
cortexm_forced_halt: Only release SRST after "Halt on reset" command.
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This should make life easier if program remaps JTAG/SWD pins so that
with program running, JTAG/SWD access is impossible.
2019-01-07 13:22:01 +13:00
3ebf049424
cortexm: Only force halt before probe if idcode is unknown and ROM TABLE unreadable.
2019-01-07 13:22:01 +13:00
6633f74d95
stm32h7/f7: Write DBGMCU_CR only on attach.
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Split probe/attach for STM32H7.
2019-01-07 13:22:01 +13:00
8575d3e7a6
stm32f7/h7: Use the DPv2 provided idcode for MCU identification.
2019-01-07 13:22:01 +13:00
525b90d4e5
cortexm: Only force halt before probe() if probe was forced.
2019-01-07 13:22:01 +13:00
da75acf015
adiv5: Only force cortexm_probe() once.
2019-01-07 13:22:01 +13:00
489f24584b
adiv5: Read TARGETID on DPv2 devices.
2019-01-07 13:22:01 +13:00
cde7726b87
cortexm: detach still needs extra cycles.
2019-01-07 13:22:01 +13:00
14bedcc441
Add support for LPC11U3X devices.
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The DeviceID register has a different address from the LPC11XX devices.
But it is shared with the LPC8XX family.
2018-10-04 08:53:05 -07:00
91dd879dac
Another nRF52 ID.
2018-09-13 16:18:29 -06:00
f5cf6d4497
adiv5_swdp: Add extra idle cycles with write transactions.
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These extra cycles are needed by some CPU, e.g. STM32L0x1 to cross the SWCLK
/HCLK domains. Revert insufficient #373 also tackling that problem.
Thanks to Thorsten von Eicken for pointing out.
2018-09-06 17:29:20 +02:00
f39701c4c8
Move the LPC17xx probe function down since it performs an IAP call which can hang when performed on other devices than a LPC17xx
2018-09-05 17:40:02 +02:00
c5c0783337
Merge pull request #378 from markrages/nordic_unlock
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Add extra port for mass erasing / unprotecting nRF52 with APPROTECT set.
2018-07-28 14:56:03 +12:00
d0a8ce0819
Add extra port for mass erasing / unprotecting nRF52 with APPROTECT set.
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Mostly copied from the equivalent in kinetis.c and
https://devzone.nordicsemi.com/f/nordic-q-a/12484/approtect-and-dap/47301
2018-07-27 16:07:19 -06:00
6fd3ede5c7
Merge pull request #377 from markrages/add_id_2
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Another chip ID for Nordic nRF52832.
2018-07-28 09:53:00 +12:00
cb8596b0b2
Another chip ID for Nordic nRF52832.
2018-07-27 15:09:14 -06:00
5918608156
STM32F7: Debug does not work with WFI without DBG_SLEEP
2018-07-27 10:59:54 +02:00
2c1c913213
adiv5.c: Add units found on M7.
2018-07-27 10:59:54 +02:00
f234074099
stm32h7: Start of support.
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Implement probe, memory map, erase, write, uid, crc, parallelism.
2018-07-27 10:59:54 +02:00
a988bba035
Merge pull request #372 from richardeoin/efm32-1
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[efm32] Add support for EFM32 devices with different DI and MSC layouts
2018-07-27 11:41:58 +12:00
d7b173ab39
Merge pull request #310 from UweBonnes/stm32l4r
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arget/stm32l4.c: Add stm32l4r series and clean up.
2018-07-27 10:32:00 +12:00
b4dc666aca
Add nRF52 QIAA C0
2018-07-26 23:13:38 +01:00
4a312c7697
target/stm32l4.c: Add stm32l4r series and clean up.
2018-07-22 15:44:00 +02:00
7034d0bb94
stm32l4: Option byte loader must be started with flash unlocked!
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Warn user that device will loose connection.
2018-07-22 15:44:00 +02:00
83f9655f6e
stm32l4: Fix wrong default for WRP2A option halfword.
2018-07-22 15:44:00 +02:00
139707c5c0
cortexm/detach: Add a dummy transaction after cleaning DHCSR.
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This replaces the seemingly superflous swdptap_seq_out() at
the end of adiv5_swdp_low_access() needed to continue after detach.
2018-07-19 10:57:41 +02:00
a7106bd346
[efm32] Add support for flashing User Data (UD) and Bootloader (BL) regions
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* UD region on all devices, some devices also have BL region
* Fix page size for EZR32HG
2018-07-18 08:57:01 +00:00
55bb96cfdb
[efm32] tidy compiler warning
2018-07-16 20:47:24 +00:00
98faaceb70
[efm32] Add support for EFM32 devices with different DI and MSC layouts
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* DI layout is identified by attempting to read OUI from both layouts
* MSC address is passed to flashstub in r3
Retested EZR32LG230 (EZR Leopard Gecko M3)
Tested EFR32BG13P532F512GM32 (EFR Blue Gecko)
Achieves aims of PR #264 (I think) Thanks to @dholth and @ryankurte for inspiration
Fixes Issue #226
2018-07-16 20:18:36 +00:00
59d6eca8f0
Fixes option erase for STM32F070x6 STM32F070xB STM32F030xC
2018-07-10 18:44:05 +03:00
c5713ea8d3
Merge pull request #366 from UweBonnes/f7_fix
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stm32f4.c: F76x also has large sector by default.
2018-07-07 13:03:14 +12:00
1b51c4961e
Merge pull request #363 from korken89/master
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Removed debug bits for F4/F7 target, same as all other MCUs now
2018-07-07 13:01:05 +12:00
50514ccc31
stm32f4.c: F76x also has large sector by default.
2018-07-05 13:29:43 +02:00
5e8c8cae10
Removed debug bits for F4/F7 target, same as all other MCUs now
2018-06-28 16:31:34 +02:00
5548d54626
common/swdptap: some clean up.
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Remove superfluous transaction.
Use native variable size.
2018-06-26 19:50:14 +02:00
7e3fe352ad
adiv5_swdp.c: Use swdptap_seq_out for initialiation sequence.
2018-06-26 19:50:14 +02:00
b2defad844
Merge pull request #356 from UweBonnes/probe_halted
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Probe halted
2018-06-21 10:06:56 -07:00
b59bbac0b2
stm32l4: Use buffered direct write to flash.
2018-06-16 13:30:53 +02:00
891d6de8eb
stm32f1.c: Use buffered direct write to flash with half word access.
2018-06-16 13:30:53 +02:00
f1752c7a1a
stm32f4: Allow DWORD parallelism.
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Needs external VPP!
2018-06-16 13:30:53 +02:00
15312eb86c
stm32f4: Honor parallelism also for erase.
2018-06-16 13:30:53 +02:00
bfeb6f0db9
stm32f4: Use buffered direct flash write with choosen size.
2018-06-16 13:30:53 +02:00
54f73858f9
Provide a target function to write with given size.
2018-06-16 13:30:08 +02:00
17b817f37b
cortexm: Allow to set timeout to wait for halt.
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This allows to gain access to devices spending long time in WFI without
the need for a reset, at the expense of possible long waiting times.
Using Reset means loosing the device runtime context.
2018-06-13 14:03:50 +02:00
9e365a58f7
Cortex-M: Try harder to halt devices in WFI.
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E.g. STM32F7 and L0 need multiple C_DEBUG and C_HALT commands to halt
the device.
2018-06-13 14:02:43 +02:00
66e357d517
Cortex-M: Probe Cortex-M even if ROM table read fails.
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Rom table in some devices (e.g. STM32L0/F7) can not be read while
device is in WFI. The Cortex-M SWD signature is however available.
If we know by that signature, that we have a Cortex-M, force a
probe for Cortex-M devices.
2018-06-13 13:04:17 +02:00
ae6f0eadc9
Support for MSP432 TI MCUs ( #353 )
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Introduces flashing and debugging support for Texas Instruments MSP432
series of MCUs
2018-06-07 08:34:21 +12:00
077e455a94
Setting the driver string on scan.
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This way swdp_scan and jtag_scan commands will show the chip that was
detected instead of the generic STM32F4 string. The generic name is
most confusing when attaching to an STM32F7 target.
2018-06-01 12:46:14 -07:00
df05d7ce7b
libftdi: Allow device specific port/pin to read SWD bitbanged.
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Gracefully abort swd scan if devices can not do SWD.
Best effort to indicated SWD capability on existing cables and
add descriptions for the cables.
2018-05-30 19:21:03 +02:00
f3cacba219
libftdi: Flush buffer with detach.
2018-05-30 19:21:03 +02:00
48d232807e
Merge pull request #337 from adamgreig/stm32f4-ram-size
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Update maximum RAM sizes for F4 and F7 devices
2018-04-26 13:38:11 +12:00
e1cefb2031
Update maximum RAM sizes for F4 and F7 devices
2018-04-24 11:06:07 +01:00
93f3b14b68
stm32f1(f0): Do not read normal device registers during probe.
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Device may not be halted and memory map setup may fail.
2018-04-23 11:06:08 +12:00
a0596a0dcc
stm32l4: Build Memory Map during attach.
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Reading target registers while target not halted may fail and result in
invalid memory map.
2018-04-23 11:06:08 +12:00
5f404cdbc0
Construct memory map on the stack
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The memory map uses 1k of SRAM and is only needed during attach. Release
after use lowers pressure on SRAM.
2018-04-23 10:51:04 +12:00
63967346cd
stm32f4: Don't duplicate resources on reattach.
2018-04-23 10:48:05 +12:00
00decb3718
target: Separate function to free memory map.
2018-04-23 10:48:05 +12:00
1fd2a24c2d
stm32f4: Only construct memory map at attach.
2018-04-23 10:48:05 +12:00
9d7925792f
Merge branch 'master' into always_buffer_flash
2018-04-23 10:40:20 +12:00
fa62403ee3
nrf51: Add nRF51802 device id. ( #331 )
2018-04-03 10:45:56 +12:00
cfaa5ea963
Merge branch 'korken89-master'
2018-03-27 13:01:06 +13:00
76bfb4929d
Use lowercase register names.
2018-03-27 13:00:39 +13:00
a3f855ce5c
Merge branch 'master' of https://github.com/konsgn/blackmagic into konsgn-master
2018-03-27 08:03:03 +13:00
31965a5bbc
Added support for k64 ( #301 )
2018-03-25 14:43:33 -07:00
471ce2547c
Added LPC17xx support ( #317 )
2018-03-25 12:53:30 -07:00
a41d8cb97a
Another nRF52 device id. ( #315 )
2018-03-25 12:37:51 -07:00
1ee6d4503e
Update to split 'special' into its sane parts (update from @mubes)
2018-03-24 16:44:59 +01:00
04fbabb299
mkl27 support
2018-01-21 23:43:01 -05:00
1fe870b8df
added MKL27<128kB support
2018-01-16 13:23:36 -05:00
922f857de7
stm32f1.c: Add missing fall through statement needed by GCC7.
2017-12-18 13:56:59 +01:00
1f3c235205
src/target/stm32f1.c: Add CCM Ram of STM32F303 devices.
2017-12-08 13:39:24 +01:00
048e8447a5
target: Only support buffered flash writes
2017-10-13 08:58:37 +13:00
c53a12bfd1
cortexm: Better cache support for Cortex-M7
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- On probe, read CTR for cache presence and minimum line length
- Make D-Cache clean a function
- Clean before memory reads
- Clean and invalidate before memory writes
- Flush all I-Cache before resume
2017-10-12 09:26:01 +13:00
0e5b3ab00e
Make Cortex M driver write DCCIMVAC (Data cache clean and invalidate by address to the PoC=Point of Coherency) prior to reading or writing each 32 bytes of RAM
2017-10-12 08:41:58 +13:00
120a2d9378
target: Fix calculation of erase size.
2017-10-05 22:11:01 +02:00
a7815fff3d
target.c: No need to split write while still in same flash block.
2017-10-04 21:52:29 +02:00
25610e5ec5
target: Fix unconsistant use of tmplen.
2017-10-04 21:52:29 +02:00
0aa47113f3
stm32f4: Fix F4 dual bank OPTCR1 to option byte mapping.
2017-10-02 16:22:14 +02:00
c4d3712b39
stm32f4.c: Rework flash structure recognition.
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Dual bank devices do not have sectors (8)12..15 !
Dual banks devices need to MER1 set for mass erase.
F72x has different FLASHSIZE_BASE
2017-10-02 16:22:14 +02:00
259f1b90df
cortexa: Check for fault on set/clear soft breakpoint.
2017-09-20 11:16:36 +12:00
1cb4271749
cortexa: Remove problematic code for AHB access.
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The old code for 'fast' memory accesses using the AHB directly
has problems with data consitency. Until this can be resolved, I'm
removing the affected code.
2017-09-19 09:13:22 +12:00
2df0c7d6a7
Merge pull request #261 from cpavlina/tm4c
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lm3s/tm4c: add TM4C1230C3PM
2017-09-06 15:34:42 +12:00
46e363393f
Add nRF52840 support (PCA10056, nrf52840 PDK)
2017-09-03 23:05:29 +00:00
37f9623de2
Added NRF51_FICR_CONFIGID for nRF51822 QFAA H2
2017-08-30 17:14:52 +02:00
37bb86267a
STM32F0: Several STM32F0[3|7]0 have same ID as other STM32F0X0.
2017-08-28 22:58:59 +02:00
a0b0b8a716
lm3s/tm4c: add TM4C1230C3PM
2017-07-21 13:29:41 -06:00
7663794fdf
Merge pull request #247 from schodet/stm32f4-x8-x32
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Allow programming STM32F4 when using a low voltage
2017-07-09 14:33:06 -07:00
Uwe Bonnes
anyn99
newbrain
Carl
Richard Meadows
Ingmar Jager
Josh Robson Chase
Ingmar Jager
Mark Rages
Rik van der Heijden
Gareth McMullin
Mike Walters
Richard Meadows
Antti Louko
Emil Fresk
newbrain
Piotr Esden-Tempski
Adam Greig
Christopher Woodall
Akila Ravihansa Perera
Mark Rages
Konsgn
Nick Downing
David R. Piegdon
Carl Sandström
Chris Pavlina