4addec0a21
lpc15xx support
2016-07-05 16:53:47 -04:00
2a5efbc1ac
Merge pull request #140 from gsmcmullin/va_translation
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cortexa: Virtual address translation and memory access through APB.
2016-06-30 18:23:31 +12:00
393a8fddef
Merge pull request #135 from gsmcmullin/timeout_overhaul
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Timeout overhaul, improve reset spin loop on Cortex-A
2016-06-30 18:23:02 +12:00
4596d88f72
cortexa: Use fast mode for APB mem access and allow byte access.
2016-06-30 17:56:01 +12:00
d16aca9ae0
cortexa: Fall back to APB memory access if no AHB available.
2016-06-29 11:11:27 +12:00
ea9c2a2030
cortexa: Catch and report faults on address translation.
2016-06-29 11:11:27 +12:00
9e2b0a86d7
cortexa: Perform VA translation on memory access.
2016-06-29 11:11:27 +12:00
09bb320a65
Change readme to markdown and add Travis and Gitter badges.
2016-06-29 10:25:09 +12:00
9c5ff37bf8
Add monitor command to force SRST
2016-06-28 14:35:43 +12:00
60c67ee156
cortexa: Flush I-Cache on detach.
2016-06-28 14:35:43 +12:00
6b3c3d3473
cortexa: Add timeout to reset spin.
2016-06-28 14:35:43 +12:00
8b4342394f
Overhaul of timeouts so they may be nested.
2016-06-28 14:35:43 +12:00
6b6ac1b961
First cut at building with Travis
2016-06-27 13:30:56 +12:00
53c7fbd543
Fixes for verbose debug output.
2016-06-23 15:03:00 +12:00
1f9fbd2d0e
Merge pull request #139 from esden/pid_cid_tables
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Use Product ID and Componend ID tables instead of defines.
2016-06-23 13:39:00 +12:00
7b2309943a
Use Product ID and Componend ID tables instead of defines.
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This patch adds tables that allow us to decode the Product ID and
Component ID registers. Based on those tables we can decide what probe
function to use. Also this makes it possible for us to understand what
ADIv5 components the target is offering to us, even if we do not
need/use them.
The tables include a comment describing how the register bits need to be
interpreted.
2016-06-22 18:34:04 -07:00
dcff9f9186
Merge pull request #138 from esden/debug_strings
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Added black magic verbose/debug mode switch.
2016-06-23 12:55:48 +12:00
20c994eece
Added black magic verbose/debug mode switch.
2016-06-22 17:28:26 -07:00
90c0c28327
cortexa: Redirect read of PC through r0. MCR is unpredictable for r15.
2016-06-23 12:00:04 +12:00
eb1904247e
Merge pull request #136 from funkobongrip/lpc82x
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Add NXP LPC82x support
2016-06-22 10:06:58 +12:00
2639bdbe23
Add NXP LPC82x support
2016-06-21 10:33:34 +02:00
f4eda28a05
Merge pull request #134 from esden/master
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BMPM V2 target power control GPIO needs to be an open drain drive.
2016-06-07 10:12:02 +12:00
9be5cdb702
BMPM V2 target power control GPIO needs to be an open drain drive.
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BMPM V2 uses a biasing resistor for the true switch mosfet circuit.
Because of that the weak pull-up/down of the stm32 is not asserting the
correct gate voltage for the mosfets to fully switch through. Because of
that we need to use open drain configulation of the GPIO instead.
2016-06-06 15:01:37 -07:00
55cea5f90a
Merge pull request #132 from dlaw/kinetis
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Add Kinetis KL27 support
2016-06-01 07:48:13 +12:00
8770b4aa39
Merge pull request #133 from gsmcmullin/armv6m-fix
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adiv5: Probe ARMv6M devices with Cortex-M driver.
2016-06-01 07:48:03 +12:00
24d973e39f
adiv5: Probe ARMv6M devices with Cortex-M driver.
2016-05-30 08:48:54 +12:00
25a46a83f9
Add Kinetis KL27 support
2016-05-18 12:06:54 -04:00
bcf5b1eaa3
Merge pull request #126 from gsmcmullin/cortexa
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Cortex-A support
2016-04-28 10:56:43 +12:00
13602c5d85
cortexa: Also assert SRST to reset.
2016-04-20 12:55:12 -07:00
08c9ab54d7
adiv5: Try abort sequence if DP is stalling during scan.
2016-04-20 12:55:12 -07:00
bed6627579
adiv5: Implement access to DP ABORT register.
2016-04-20 11:36:42 -07:00
68bf825042
cortexa: Disable interrupts while single stepping.
2016-04-20 11:35:58 -07:00
88bf92ac36
cortexa: Fix write back of PC and CPSR.
2016-04-20 11:35:25 -07:00
d94f7e0c75
Remove old arm7tdmi header.
2016-04-19 22:23:19 -07:00
0ab878dcd2
cortexa: Add short delay after reset, before reattaching.
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Allows the early bootloader to configure the DDR ram.
2016-04-19 13:29:22 -07:00
a2ec877b73
cortexa: Restore cache clean and invalidate on memory writes.
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Include a small optimisation of APB access to speed up the process.
2016-04-19 13:24:05 -07:00
49f89cfc95
cortexa: Fix detach.
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Also pulls out internal register cache functions from halt/resume.
2016-04-19 13:24:05 -07:00
f6b574e0b0
Cortex-A target support.
2016-04-19 13:24:05 -07:00
60f3be501e
Pass breakpoint length to target.
2016-04-19 13:24:05 -07:00
459bae4ea1
ADIv5 structural changes.
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- Probe ROM table
- Mem-AP no longer pretends to be a target
- AP no longer provides priv pointer
2016-04-19 13:24:05 -07:00
8d9d6f692c
Fix platform_delay
2016-04-19 13:23:04 -07:00
da10f8a6bc
Merge pull request #129 from gsmcmullin/srst_cleanup
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Cleanup of SRST handling.
2016-04-19 13:20:36 -07:00
cd1d72257f
Cleanup of SRST handling.
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- Remove connect_assert_srst global.
- Attach functions always release reset.
- Platforms provide a method to poll the reset pin.
- Reset on scan is all internal to command.c
- Reset is released on a failed scan. Fixes #111
2016-04-19 13:12:16 -07:00
e010cd763d
Merge pull request #125 from bvernoux/master
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Cleanup and Fix code for HydraBus
2016-04-18 13:01:00 -07:00
0e8cbd4419
Merge pull request #127 from gsmcmullin/warning_fixes
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Fix build warnings.
2016-04-18 12:32:46 -07:00
294d93cfe3
Fix build warnings.
2016-04-18 12:25:48 -07:00
2e3778e772
Cleanup and Fix code for HydraBus
2016-04-18 00:48:06 +02:00
2685906fc8
Merge pull request #124 from gsmcmullin/windows_fixes
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Fixes to allow building for Windows.
2016-04-16 14:49:22 -07:00
799ccf99f5
Merge pull request #123 from gsmcmullin/digilent_cable
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Add Digilent JTAG-HS3 FTDI cable.
2016-04-15 13:06:30 -07:00
966b21c3e1
Merge pull request #121 from esden/bmpm2_support
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Bmpm2 support
2016-04-15 13:01:34 -07:00
David Lawrence
Gareth McMullin
Piotr Esden-Tempski
David Brandt
bvernoux