sys64738
/
blackmagic
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
2,212 Commits 3 Branches 0 Tags 5.2 MiB
Commit Graph

119 Commits

Author SHA1 Message Date
Uwe Bonnes 19e1fddba2 adiv5: Remove unnescessary read. 2020-11-27 22:26:48 +01:00
Uwe Bonnes cda83d3084 Fix memleaks. 
Happened e.g. when Stlink could not enter debug or when cortexm_prepare timed out.
 2020-11-27 22:26:48 +01:00
Uwe Bonnes 9ac5adfcef adiv5: Additional decoding. 2020-11-27 22:26:48 +01:00
Uwe Bonnes 1f7a716710 adiv5.c: Run cortexm_prepare on all suspected CortexM instances. 
Gets all debug units of the second CPU of a STM32H745 visible.
 2020-10-23 09:40:15 +02:00
Uwe Bonnes 18673d9a56 adiv5: Rework DP/AP refcounting. 
ASAN non longer reports leaks with the STM32H745.
 2020-10-23 09:40:15 +02:00
Uwe Bonnes f76a7c4e92 adiv5: Release devices after scan. 
Before, scanning only kept device stopped until POR or attach/detach cycle.
 2020-10-23 09:40:15 +02:00
Uwe Bonnes c161521c26 cortexm: Designer ARM must be in the default path when probing. 2020-10-23 09:40:15 +02:00
Uwe Bonnes cdd07544d5 Cortexm: Allow pure debug on devices not yet handled for flashing 
- Recognize STM32L552 and MIMXRT10XX
- Fix another PIDR
- Fix bad debug print string.
 2020-10-23 09:40:15 +02:00
Uwe Bonnes 0ffb4f7b18 cortexm: Fix protected SAM detection 
- Only run cortex_prepare() if reading cidr fails
- With Atmel DSU detected, run cortexm_probe()
 2020-10-17 12:49:37 +02:00
Uwe Bonnes 877b4be8ee cortexm: Restrict probing by using the ap_designer. 
More designers need to be observed and reported by users and added.
Request users to send needed data.
 2020-10-07 20:12:35 +02:00
Uwe Bonnes 44bfb62715 Adiv5: Print Designer/Partno when device is not recognized 
t->idcode is now 16 bit.
 2020-10-07 20:12:35 +02:00
Uwe Bonnes c456fc7f61 adiv5: Store AP designer and partno in the AP structure. 2020-10-07 20:12:32 +02:00
Uwe Bonnes 159196c2ad Cortexm: Remove forced_halt. 2020-10-07 20:11:33 +02:00
Uwe Bonnes 9bb2807706 adiv5/romtable: Prepare CortexM devices to read the ROMTABLE 
It seems, writing to DHCSR fails silent when the device is sleeping.
Reading DHCS during sleep may return nonsense.
Repeated write may at some point catch the device running and succeed.
With devices sleeping for long time and running on faster clock the
chance for a successful hotplug gets smaller.

- Try hard to halt a sleeping device
- Prepare vector catch and enable all debug units by TRACENA
- Release reset
- Apply device specific fixes
-- STM32F7: Store old value of DBGMCU_CR, enable debug in sleep in
   DBGMCU before reading PIDR and restore DBGMCU on detach.

Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
 2020-10-07 20:11:17 +02:00
Uwe Bonnes 014abf6cc9 adiv5.c: Reduce number of errors if reading cidr fails. 2020-10-01 15:33:28 +02:00
Uwe Bonnes be40d2b851 adiv5: Check Debug Base Address early 
Reduces printout when scanning the romtable
 2020-10-01 15:22:17 +02:00
Uwe Bonnes 2fdd94adeb STM32F7: Add another missing Arch ID. 2020-09-24 16:20:34 +02:00
Uwe Bonnes 71e9d78210 adiv5.c: Add another ARCH_ID found STM32F205. 2020-08-01 14:00:17 +02:00
Uwe Bonnes 1b12e407fd adiv5: Add missing arch identifiers for Cortex-M7 ETM. 2020-07-31 11:53:15 +02:00
Francesco Valla 696daa8352 adiv5: fix debug print of dev_type 
Since dev_type is an 8 bit unsigned integer, use the PRIx8 macro instead
of PRIx32.
 2020-07-29 11:32:24 +02:00
Uwe Bonnes 726d4b4496 adiv5.c: Add missing DEVTYPE and ARCHID to some existing PIDRs(#698,#699) 
Probably more additions are needed.
 2020-07-14 16:26:32 +02:00
Fredrik Ahlberg 4391851f4d adiv5: Change component descriptions from MTB to Micro Trace Buffer for consistency 2020-07-12 22:29:04 +02:00
Fredrik Ahlberg 0aadd0abce Adiv6: Add comment on DEVTYPE and ARCHID fields with references 2020-07-12 22:27:46 +02:00
Fredrik Ahlberg a35e9c8e5c Adiv6: Read DEVTYPE and ARCHID to identify Cortex-M23 and Cortex-M33 debug components 2020-07-12 12:00:31 +02:00
Uwe Bonnes eabd69dcdb Adiv5: Protect DBG/SYSTEM Power-Up request with timeout too. 
CMSIS-DAP without connected target looped infinite in that situation.
 2020-06-07 13:14:32 +02:00
Uwe Bonnes dc3fd2eb06 Classify debug messages 
Firmware BMP with ENABLE_DEBUG=1 will print WARN and INFO as before.
PC-Hosted BMPwill alway print to stderr. Warn is printed unconditional,
INFO, GDB, TARGET, DONGLE and WIRE will print if their appropriate bit in
cl_debuglevel is set via the -v verbose command line argument.
INFO will go to stdout with -t or -l.
 2020-06-05 14:59:30 +02:00
Uwe Bonnes 64f3dff8a8 PC-Hosted: Better debug output. 2020-06-05 14:59:30 +02:00
Valmantas Paliksa b06c0ba8d5 bmp_remote: Use high level functions. 
Based on #570 (OpenOCD HLA interface driver for Blackmagic), but now
usefull for bmp-remote.
 2020-06-05 14:59:30 +02:00
Uwe Bonnes c3d509e6c0 Clean up PLATFORM_HAS_DEBUG 
Use only for firmware platforms.
 2020-06-05 14:59:30 +02:00
Uwe Bonnes 563df2d354 Detour ADIv5 high-level functions. 2020-06-05 14:59:30 +02:00
Uwe Bonnes b0cf7d24bd adiv5.c: Fix another leak. 2020-06-05 14:59:30 +02:00
Uwe Bonnes 783ec377d9 adiv5: Export extract. 2020-06-05 14:59:30 +02:00
Uwe Bonnes 16967b4328 adiv5: Remove only local dp_idcode used from ADIv5_DP_t struct. 2020-06-05 14:59:30 +02:00
Uwe Bonnes b8b34e7b1d adiv5: remove cfg for AP structure, cfg is only used local. 2020-06-05 14:59:30 +02:00
Uwe Bonnes c4d7232223 Export function to read out PIDR and use for samd and samx5x. 2020-03-26 19:05:57 +01:00
Uwe Bonnes a0e42e229b Make more things static. 
No functional change intendend.
 2020-03-26 18:44:19 +01:00
Uwe Bonnes a7efe7cc14 cl-utils: Display targets found. 
+ other small changes in DEBUG output.
 2020-03-10 17:34:30 +01:00
Uwe Bonnes 2065c70888 adiv5: Split PRIx64 into two PRIx32 as nanolib does not support PRIx64. 2020-03-10 10:56:42 +01:00
Uwe Bonnes 75186f7d50 ADIv5: More CoreSight device decoding: 
- MTB-M0+ (Simple Execution  Trace)
- M33: Devices need finer decoding (DEVTYPE at offset 0xfcc)
 2020-03-08 22:37:59 +01:00
Uwe Bonnes 288620551f adiv5: Print out SYSROM PIDR. 
We need to know more about what devices indicate proper PIDR and what
devices fail to do so.
 2020-03-04 19:02:07 +01:00
Uwe Bonnes 1bef51e145 adiv5: Abort scanning APs after 8 void APs. 2019-12-08 16:43:19 +01:00
Richard Meadows 5943552a6b [efm32] Probe for the EFM32 Authentication Access Port (AAP) 
Supported functionality through this AP:
* Issuing a DEVICEERASE command
 2019-12-08 16:21:02 +01:00
Uwe Bonnes b9249fe104 adiv5: Activate DP reset sequence, guarded with timeouts. 
While not working on most STM32, it succeeds on STM32G474.
Thanks to Dave Marples <dave@marples.net>
 2019-10-20 22:15:28 +02:00
Ken Healy 5c805c7d35 Fix buffer overflow in adiv5_component_probe() 2019-10-12 11:44:08 +02:00
Uwe Bonnes f010a567bd adiv5: Reject APs duplicating last AP. 
Seen with TM4C129 on black MSP432R401 Launchpad. Scanning of APs is aborted,
so valid APs after duplicated APs are ignored.
 2019-09-29 12:44:37 +02:00
UweBonnes 00937348b3
Fixes to compile "make ENABLE_DEBUG=1 all_platforms" (#515) 2019-09-04 13:09:43 +02:00
Uwe Bonnes aef055bb6f adiv5: If setup AP0 fails, fail immediate. 2019-08-31 11:20:17 +02:00
Uwe Bonnes 067956266c Adiv5: Remove weak attribute to ease windows compile. 2019-07-18 18:16:19 +02:00
Uwe Bonnes 9e898cc4b8 adiv5: Add more coresight part numbers found on STM32MP157c-DK2 (#492). 
Only print corename if not NULL.
 2019-07-18 17:39:48 +02:00
Uwe Bonnes c44cb904b0 adiv5.c: Format debug output more tense. 2019-07-17 17:38:21 +02:00
Uwe Bonnes 634c07c432 adiv5: Add TSGEN. 2019-07-17 17:38:21 +02:00
Uwe Bonnes bd530c8951 adiv5.c: Make functions weak where high level platforms may implement different. 2019-07-17 17:26:00 +02:00
Richard Meadows 600bc9f029 Generate DEBUG warnings and return if `malloc`/`calloc` fail. 
This is will make debugging earier if this does happen, rather than
dereferencing the null pointer (or passing it to memcpy, or worse).

blackmagic PR #475
 2019-05-26 18:56:12 +02:00
Richard Meadows 61e9607594 [adiv5] Improvements in ADIv5 
* Reference latest version of the ARM specification
* ROM tables - more debug information, including printing SYSMEM bit
* MEM-AP - reject when Debug Base Address entry is not
  present/invalid. These would only have errored in
  adiv5_component_probe.
* Fix maximum number of entries in Class 0x1 ROM Table to 960. See ARM
  IHI 0031E Table D3-1 ROM Table register summary.
* Resolve note in STM32H7 driver with explaination

blackmagic PR #474
 2019-05-24 22:00:44 +02:00
Uwe Bonnes 525b90d4e5 cortexm: Only force halt before probe() if probe was forced. 2019-01-07 13:22:01 +13:00
Uwe Bonnes da75acf015 adiv5: Only force cortexm_probe() once. 2019-01-07 13:22:01 +13:00
Uwe Bonnes 489f24584b adiv5: Read TARGETID on DPv2 devices. 2019-01-07 13:22:01 +13:00
Gareth McMullin c5c0783337
Merge pull request #378 from markrages/nordic_unlock 
Add extra port for mass erasing / unprotecting nRF52 with APPROTECT set.
 2018-07-28 14:56:03 +12:00
Mark Rages d0a8ce0819 Add extra port for mass erasing / unprotecting nRF52 with APPROTECT set. 
Mostly copied from the equivalent in kinetis.c and
https://devzone.nordicsemi.com/f/nordic-q-a/12484/approtect-and-dap/47301
 2018-07-27 16:07:19 -06:00
Uwe Bonnes 2c1c913213 adiv5.c: Add units found on M7. 2018-07-27 10:59:54 +02:00
Gareth McMullin b2defad844
Merge pull request #356 from UweBonnes/probe_halted 
Probe halted
 2018-06-21 10:06:56 -07:00
Uwe Bonnes 54f73858f9 Provide a target function to write with given size. 2018-06-16 13:30:08 +02:00
Uwe Bonnes 66e357d517 Cortex-M: Probe Cortex-M even if ROM table read fails. 
Rom table in some devices (e.g. STM32L0/F7) can not be read while
device is in WFI. The Cortex-M SWD signature is however available.
If we know by that signature, that we have a Cortex-M, force a
probe for Cortex-M devices.
 2018-06-13 13:04:17 +02:00
Gareth McMullin 7de304d72a kinetis: Add recovery mode target. 2017-03-27 10:51:36 +13:00
Gareth McMullin bb93af50c3 adiv5: Debug log on failure to read ROM table. 2017-03-27 09:05:37 +13:00
Gareth McMullin cd1bef89bb adiv5_dp_init: make ctrlstat volatile to supress warning. 2017-01-09 09:13:19 +13:00
Piotr Esden-Tempski 4348f0d135 Fixed double const. 
The way the const pointer was written caused at least the clang compiler
to complain about double cosnst. I am not sure if the way it was written
before it resulted in the intended "make everything const" goal. But the
way it is written now it adheres to the right to left reading rule.
 2016-10-19 14:37:03 -07:00
Gareth McMullin 9a8cef04e0 Clean up debug format strings. 2016-09-29 21:31:18 -07:00
Gareth McMullin b494279fe5 Move target files into separate directory. 2016-07-13 08:31:09 +12:00
Renamed from src/adiv5.c (Browse further)