Uwe Bonnes
976c763747
jtag remote: Start fixing handling M0 (second jtag) for LPC4322 in high-level
...
- LPC11: Only print none-null unknown idcodes.
2020-10-23 09:40:15 +02:00
Uwe Bonnes
c161521c26
cortexm: Designer ARM must be in the default path when probing.
2020-10-23 09:40:15 +02:00
Uwe Bonnes
cdd07544d5
Cortexm: Allow pure debug on devices not yet handled for flashing
...
- Recognize STM32L552 and MIMXRT10XX
- Fix another PIDR
- Fix bad debug print string.
2020-10-23 09:40:15 +02:00
Uwe Bonnes
0ffb4f7b18
cortexm: Fix protected SAM detection
...
- Only run cortex_prepare() if reading cidr fails
- With Atmel DSU detected, run cortexm_probe()
2020-10-17 12:49:37 +02:00
Uwe Bonnes
5bc743d221
samd: Propagate security after setting security by chip reset.
2020-10-17 12:49:37 +02:00
Uwe Bonnes
8b929c12c9
hosted/jtag: Transfer jtag_devs to firmware.
2020-10-16 20:03:03 +02:00
Uwe Bonnes
3d92b82678
jtag: Use index and not device structure for jtag_dev_write_ir and jtag_dev_shift_dr
2020-10-16 20:03:03 +02:00
Uwe Bonnes
7ccf0d3e03
jtag_dev_t: Make dev, idcode and desc less generic.
...
No codechange intended.
2020-10-16 20:03:03 +02:00
Uwe Bonnes
87b546777a
nrf51: Be more verbose about the protection status.
2020-10-16 12:16:33 +02:00
Richard Meadows
4108b649c2
stm32h7: Add support for new product lines
...
Add support for:
* STM32H7B3/B0/A3 (RM0455)
* STM32H723/33/25/35/30 (RM0468)
Successfully tested with:
* STM32H7A3ZIT (RM0455)
* STM32H747XIH (check for regressions)
2020-10-10 22:09:34 +02:00
Uwe Bonnes
877b4be8ee
cortexm: Restrict probing by using the ap_designer.
...
More designers need to be observed and reported by users and added.
Request users to send needed data.
2020-10-07 20:12:35 +02:00
Uwe Bonnes
91d1ef8bf6
target/stm32: Use t->idcode with probe.
2020-10-07 20:12:35 +02:00
Uwe Bonnes
44bfb62715
Adiv5: Print Designer/Partno when device is not recognized
...
t->idcode is now 16 bit.
2020-10-07 20:12:35 +02:00
Uwe Bonnes
c456fc7f61
adiv5: Store AP designer and partno in the AP structure.
2020-10-07 20:12:32 +02:00
Uwe Bonnes
159196c2ad
Cortexm: Remove forced_halt.
2020-10-07 20:11:33 +02:00
Uwe Bonnes
9bb2807706
adiv5/romtable: Prepare CortexM devices to read the ROMTABLE
...
It seems, writing to DHCSR fails silent when the device is sleeping.
Reading DHCS during sleep may return nonsense.
Repeated write may at some point catch the device running and succeed.
With devices sleeping for long time and running on faster clock the
chance for a successful hotplug gets smaller.
- Try hard to halt a sleeping device
- Prepare vector catch and enable all debug units by TRACENA
- Release reset
- Apply device specific fixes
-- STM32F7: Store old value of DBGMCU_CR, enable debug in sleep in
DBGMCU before reading PIDR and restore DBGMCU on detach.
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
2020-10-07 20:11:17 +02:00
Gareth McMullin
dc8924a2bc
stm32h7: Don't tc_printf from flash functions ( #747 )
...
* stm32h7: Don't tc_printf from flash functions
Receving an 'O' packet while flashing confuses GDB and then
weird stuff happens.
* Replace tc_printf with DEBUG_WARN
2020-10-05 10:45:18 +02:00
Uwe Bonnes
014abf6cc9
adiv5.c: Reduce number of errors if reading cidr fails.
2020-10-01 15:33:28 +02:00
Uwe Bonnes
be40d2b851
adiv5: Check Debug Base Address early
...
Reduces printout when scanning the romtable
2020-10-01 15:22:17 +02:00
Eivind Alexander Bergem
38bc5bbf82
Add LPC546xx support #741 #553
2020-09-30 12:56:53 +02:00
Uwe Bonnes
2fdd94adeb
STM32F7: Add another missing Arch ID.
2020-09-24 16:20:34 +02:00
Uwe Bonnes
bdb351a6ea
adiv5_swdp: On ACK_FAULT, error() and try again once #731
...
when writing CSW.
2020-09-18 20:07:32 +02:00
Damien Merenne
120b3134bb
Add SAM4SD32C/B support.
2020-09-07 17:36:15 +02:00
Uwe Bonnes
8a2bce26f2
Hosted: Fix memory leak when platform_swdptap_init fails.
2020-09-04 11:49:13 +02:00
David Lawrence
f65afb1588
Use correct IAP entry address for LPC84x
2020-08-14 20:00:18 +02:00
Uwe Bonnes
71e9d78210
adiv5.c: Add another ARCH_ID found STM32F205.
2020-08-01 14:00:17 +02:00
Uwe Bonnes
1b12e407fd
adiv5: Add missing arch identifiers for Cortex-M7 ETM.
2020-07-31 11:53:15 +02:00
Francesco Valla
696daa8352
adiv5: fix debug print of dev_type
...
Since dev_type is an 8 bit unsigned integer, use the PRIx8 macro instead
of PRIx32.
2020-07-29 11:32:24 +02:00
Uwe Bonnes
726d4b4496
adiv5.c: Add missing DEVTYPE and ARCHID to some existing PIDRs(#698,#699)
...
Probably more additions are needed.
2020-07-14 16:26:32 +02:00
Uwe Bonnes
09ceaea70f
adiv5_swdp: Fix another memory leak.
2020-07-14 15:02:13 +02:00
Fredrik Ahlberg
7ebb94d134
cortexm: Add comment on CPUID register
2020-07-12 22:54:39 +02:00
Fredrik Ahlberg
4391851f4d
adiv5: Change component descriptions from MTB to Micro Trace Buffer for consistency
2020-07-12 22:29:04 +02:00
Fredrik Ahlberg
0aadd0abce
Adiv6: Add comment on DEVTYPE and ARCHID fields with references
2020-07-12 22:27:46 +02:00
Fredrik Ahlberg
fcd945a529
cortexm: Read CPUID to identify core version
2020-07-12 12:08:22 +02:00
Fredrik Ahlberg
39a20d78ff
v8m: only check relevant bits in DHCSR when polling in cortexm_forced_halt
2020-07-12 12:07:12 +02:00
Fredrik Ahlberg
a35e9c8e5c
Adiv6: Read DEVTYPE and ARCHID to identify Cortex-M23 and Cortex-M33 debug components
2020-07-12 12:00:31 +02:00
Uwe Bonnes
661f78033a
stm32f1: Add F1 XL with dual bank handling,
2020-07-08 14:31:58 +02:00
Uwe Bonnes
eabd69dcdb
Adiv5: Protect DBG/SYSTEM Power-Up request with timeout too.
...
CMSIS-DAP without connected target looped infinite in that situation.
2020-06-07 13:14:32 +02:00
Uwe Bonnes
dc3fd2eb06
Classify debug messages
...
Firmware BMP with ENABLE_DEBUG=1 will print WARN and INFO as before.
PC-Hosted BMPwill alway print to stderr. Warn is printed unconditional,
INFO, GDB, TARGET, DONGLE and WIRE will print if their appropriate bit in
cl_debuglevel is set via the -v verbose command line argument.
INFO will go to stdout with -t or -l.
2020-06-05 14:59:30 +02:00
Uwe Bonnes
64f3dff8a8
PC-Hosted: Better debug output.
2020-06-05 14:59:30 +02:00
Valmantas Paliksa
b06c0ba8d5
bmp_remote: Use high level functions.
...
Based on #570 (OpenOCD HLA interface driver for Blackmagic), but now
usefull for bmp-remote.
2020-06-05 14:59:30 +02:00
Uwe Bonnes
c3d509e6c0
Clean up PLATFORM_HAS_DEBUG
...
Use only for firmware platforms.
2020-06-05 14:59:30 +02:00
Uwe Bonnes
563df2d354
Detour ADIv5 high-level functions.
2020-06-05 14:59:30 +02:00
Uwe Bonnes
9969c984f3
detour jtag primitives.
2020-06-05 14:59:30 +02:00
Uwe Bonnes
e34a27f72c
Detour swd primitives.
2020-06-05 14:59:30 +02:00
Uwe Bonnes
b0cf7d24bd
adiv5.c: Fix another leak.
2020-06-05 14:59:30 +02:00
Uwe Bonnes
783ec377d9
adiv5: Export extract.
2020-06-05 14:59:30 +02:00
Uwe Bonnes
966ac4036d
target.c: Check for valid flash structure.
2020-06-05 14:59:30 +02:00
Uwe Bonnes
60f39f55b4
MSP432: Warn when hardware version not supported.
2020-06-05 14:59:30 +02:00
Uwe Bonnes
05adcd9bf5
remote.c: Compile only relevant functions.
...
Do no compile firmware functions when compiling pc-hosted.
2020-06-05 14:59:30 +02:00
Uwe Bonnes
16967b4328
adiv5: Remove only local dp_idcode used from ADIv5_DP_t struct.
2020-06-05 14:59:30 +02:00
Uwe Bonnes
b8b34e7b1d
adiv5: remove cfg for AP structure, cfg is only used local.
2020-06-05 14:59:30 +02:00
Dömötör Gulyás
69e330849d
fix flash map for STM32G431, as it is a special case different from the STM32G47x and STM32G48x chips
2020-06-05 13:41:18 +02:00
Thomas Bénéteau
f9f928e9d6
Add support for LPC8N04
2020-06-05 12:33:51 +02:00
Koen De Vleeschauwer
6eb1b09c1c
pc-hosted semihosting
2020-05-27 12:51:29 +02:00
Koen De Vleeschauwer
54ee00b0f6
set semihosting sys_clock time origin
2020-05-13 17:50:39 +02:00
Uwe Bonnes
499309f648
stm32f1: Tell user about STM32F10(3) clone.
2020-05-13 13:07:55 +02:00
Alexey Shvetsov
1a83bc6892
Rename variant_string in efm32 samd samx5x ( #659 )
...
* Rename variant_string
Files efm32 samd samx5x uses same function name that collides during
linking (checked with gcc10)
Signed-off-by: Alexey 'Alexxy' Shvetsov <alexxyum@gmail.com>
* Also make xxx_variant_string static
Signed-off-by: Alexey 'Alexxy' Shvetsov <alexxyum@gmail.com>
2020-05-12 17:47:04 +02:00
Uwe Bonnes
9b939f4a3a
stm32f4: Fix option byte handling ( #654 )
...
Option bytes are not accessible with level 1 protection, so
Use FLASH_OPTCR(x)
Fix crash with "mon opt write xxxx"
Handle option manipulation better when HW Watchdog fuse is set
Allow abbreviated "mon option x<yyy>" commands
2020-05-05 12:52:32 +02:00
Sid Price
923949d5dd
Fixed variable/function name clash building on Windows
2020-05-03 15:45:31 +02:00
Koen De Vleeschauwer
9f8c7be360
semihosting
2020-05-02 12:55:29 +02:00
Koen De Vleeschauwer
8851504a41
new semihosting commands
2020-04-23 09:43:46 +02:00
Uwe Bonnes
ada17ada23
stm32f4/7: Always use largest flashsize for device family ( #633 , #635 , #644 )
...
Do not care for the FLASHSIZE register. Leave it up to the user to abuse
flash area the ST did not announce.
2020-04-21 17:04:07 +02:00
Uwe Bonnes
164eb43f00
NRF5: Do not reset target options.
2020-04-14 19:01:43 +02:00
Uwe Bonnes
bea8436561
NRF5: Always set CORTEXM_TOPT_INHIBIT_SRST( #230 )
...
The problem also happens with NRF52840. Set CORTEXM_TOPT_INHIBIT_SRST
for all NRF5 device.
People should be more persistent!
2020-04-14 18:11:23 +02:00
mean
d1468530bd
add basic support for LPC11U68 (and maybe LPC11U68)
2020-04-06 23:36:49 +02:00
Francesco Valla
846dadcc39
lmi: add support for TM4C1294NCPDT
2020-04-03 19:42:24 +02:00
Uwe Bonnes
c4d7232223
Export function to read out PIDR and use for samd and samx5x.
2020-03-26 19:05:57 +01:00
Uwe Bonnes
a0e42e229b
Make more things static.
...
No functional change intendend.
2020-03-26 18:44:19 +01:00
Uwe Bonnes
effd43ce38
Harden cortexm_reset() and remove double reset( #601 )
...
Thanks to Dave Marples <dave@marples.net> for input.
- Issue only one reset. Start with SRST. Only if not seen, use SYSRESETREQ
- Wait for release of DHCSR_S_RESET_ST before issuing more commands
- Add timeout to catch reset line stuck low
- Remove AP errors
2020-03-25 11:22:14 +01:00
Uwe Bonnes
2e185ba578
BMP/PC: Allow to compile with mingw64 ( #615 )
...
__USE_MINGW_ANSI_STDIO 1 must be set befor any windows specific included.
2020-03-24 17:59:13 +01:00
Uwe Bonnes
a7efe7cc14
cl-utils: Display targets found.
...
+ other small changes in DEBUG output.
2020-03-10 17:34:30 +01:00
Uwe Bonnes
2065c70888
adiv5: Split PRIx64 into two PRIx32 as nanolib does not support PRIx64.
2020-03-10 10:56:42 +01:00
Uwe Bonnes
75186f7d50
ADIv5: More CoreSight device decoding:
...
- MTB-M0+ (Simple Execution Trace)
- M33: Devices need finer decoding (DEVTYPE at offset 0xfcc)
2020-03-08 22:37:59 +01:00
Uwe Bonnes
919d9320fd
Remove unrelated files.
2020-03-06 19:33:20 +01:00
Uwe Bonnes
288620551f
adiv5: Print out SYSROM PIDR.
...
We need to know more about what devices indicate proper PIDR and what
devices fail to do so.
2020-03-04 19:02:07 +01:00
Uwe Bonnes
8c959defca
efm32: Make local functions static.
2020-03-04 18:44:40 +01:00
Uwe Bonnes
470c8e8cf1
target_flash_erase: Do not crash when requesting erase of unavailable flash.
...
Allow to erase from command line.
2019-12-13 14:59:42 +01:00
Uwe Bonnes
ab396f9745
Allow %z specifier in windows builds. Supercedes #562 .
2019-12-08 16:43:19 +01:00
Uwe Bonnes
1bef51e145
adiv5: Abort scanning APs after 8 void APs.
2019-12-08 16:43:19 +01:00
Uwe Bonnes
bdd76de517
Erase: Fix endless erase when erase-area did not end on (page|block) boarder.
2019-12-08 16:43:19 +01:00
Uwe Bonnes
25d24e5c34
efm32: Allow to compile with -Og.
2019-12-08 16:43:19 +01:00
Richard Meadows
5943552a6b
[efm32] Probe for the EFM32 Authentication Access Port (AAP)
...
Supported functionality through this AP:
* Issuing a DEVICEERASE command
2019-12-08 16:21:02 +01:00
Richard Meadows
260fc88d8f
[efm32] Add command to set and print bootloader enable status
...
This is a bit in the Lock Bit (LB) flash page, so it can only be
cleared by this routine
2019-12-08 16:17:02 +01:00
Richard Meadows
7f0d5febc3
[efm32] Print MSC Interrupt Flags to DEBUG after each flash write
2019-12-08 16:16:55 +01:00
Richard Meadows
e85df763b7
[efm32] add new devices PG12B, JG12B, GG11B, TG11B, GG12B
...
Rework MSC layout check
2019-12-08 15:55:12 +01:00
UweBonnes
f89542c79f
Merge pull request #203 from dlaw/master
...
Add LPC11xx command to read out unique ID from target. Restore Ram and registers after call.
2019-12-08 15:45:49 +01:00
Artur Maciuszonek
8a07f44435
Add support for the kinetis KL16Zxx devices. Tested on KL16Z128VFM4 custom hardware
2019-11-21 20:37:13 +01:00
Uwe Bonnes
e7e34600a4
lpc11: Only print Idcode if not zero and not yet handled.
...
Otherwise for all Cortex-M not yet handled this LPC messages appears.
2019-11-17 13:24:39 +01:00
Ken Healy
9198c951bb
Reduce flash space required for SAM D51/E5x driver
...
* Reuse functions that are common with the SAM D1x/D2x driver
* Only include the mbist and write8/16/32 user commands if
SAMX5X_EXTRA_CMDS is defined
2019-11-17 12:45:49 +01:00
Ken Healy
d3c330ea1a
Fix issues with Travis CI build
...
It appears the Travis version of gcc-arm-none-eabi doesn't allow the %x
printf format specifier for size_t arguments, in contrast with the
version I'm running on Ubuntu 18.04 (15:6.3.1+svn253039-1build1).
2019-11-17 12:45:49 +01:00
Ken Healy
26216beaab
Microchip SAM D51 / E5x support
...
Adds a target driver for Microchip SAM D51 / E5x family.
Tested on SAMD51G19A and SAMD51J19A. According to the datasheet, the
D51 / E5x family share the same core feature set, differing only in the
addition of CAN (E51) or ethernet controllers (E53/54). All members of
the family should be equivalent from a debug and programming perspective.
2019-11-17 12:45:49 +01:00
Kirill Zhumarin
28f0ced97e
Support NXP LPC1343
2019-11-09 18:47:07 +01:00
dpslwk
67f9d26644
samd: Add support for L21 & L22 (PR #345 )
2019-11-09 13:59:37 +01:00
Uwe Bonnes
b9249fe104
adiv5: Activate DP reset sequence, guarded with timeouts.
...
While not working on most STM32, it succeeds on STM32G474.
Thanks to Dave Marples <dave@marples.net>
2019-10-20 22:15:28 +02:00
Thomas Bénéteau
4a8cba0e9c
Add support for LPC1114/333 (LPC1100XL series)
...
This is not given in the user manual but the register immediately
following DEVICE_ID does apparently contain the correct part ID.
2019-10-13 13:01:19 +02:00
Ken Healy
5c805c7d35
Fix buffer overflow in adiv5_component_probe()
2019-10-12 11:44:08 +02:00
Uwe Bonnes
0ae7cea1ae
Add LPC84 from UM11029, Rev. 1.4, tested on LPC845 Breakout board.
2019-10-08 18:17:43 +02:00
Uwe Bonnes
1cf0b8ac13
Make all arguments for all commands (struct *t, int argc, const char **argv).
...
-Wall on gcc8 otherwise warns without -Wno-cast-function-type but older
GCCs/CLang choke on that argument:
error: unknown warning option '-Wno-cast-function-type'; did you mean
'-Wno-bad-function-cast'? [-Werror,-Wunknown-warning-option]
This adds 24 byte to the binary, as some functions are now called with
additional dummy arguments:
"Pushing and popping garbage to keep the system happy"
2019-09-29 12:44:55 +02:00
Uwe Bonnes
f010a567bd
adiv5: Reject APs duplicating last AP.
...
Seen with TM4C129 on black MSP432R401 Launchpad. Scanning of APs is aborted,
so valid APs after duplicated APs are ignored.
2019-09-29 12:44:37 +02:00