0793dac2cf
libftdi: Allow to compile with mingw and cygwin and use recent libftdi1.
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Tested with x86_64-w64-mingw32-gcc-8.2.0 and cygwin gcc (GCC) 7.3.0.
Use libftdi1 unconditionally.
Try to convice github travis to use libftdi1.
Remove unportable "uint ". Thanks to jacereda for pointing out in #400 .
2019-01-07 15:31:57 +01:00
3f0c9ccee1
Fix support for LPC1115 and LPC1115XL devices ( #415 )
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* Add support for LPC11U3X devices.
The DeviceID register has a different address from the LPC11XX devices.
But it is shared with the LPC8XX family.
* Fix support for LPC1115 and LPC1115XL devices
* Fix whitespace
2019-01-07 13:34:00 +13:00
02b9d5f1ac
Add delay to cortexm_reset
2019-01-07 13:32:17 +13:00
d7e2923990
Debug on stm32f1_flash_erase errors
2019-01-07 13:32:17 +13:00
6df793dbf0
Revert "Allow to specificy if SRST is asserted and when it is released."
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This reverts commit 44fc24e0e7
2019-01-07 13:22:01 +13:00
9ce05ae67b
stm32h7/f7: Store DBGMCU_CR on attach() and restore on detach().
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On STM32[FH]7, DBG_SLEEP must be set for debugging.
2019-01-07 13:22:01 +13:00
8d6092b73f
cortexm_forced_halt: Only release SRST after "Halt on reset" command.
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This should make life easier if program remaps JTAG/SWD pins so that
with program running, JTAG/SWD access is impossible.
2019-01-07 13:22:01 +13:00
3ebf049424
cortexm: Only force halt before probe if idcode is unknown and ROM TABLE unreadable.
2019-01-07 13:22:01 +13:00
6633f74d95
stm32h7/f7: Write DBGMCU_CR only on attach.
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Split probe/attach for STM32H7.
2019-01-07 13:22:01 +13:00
8575d3e7a6
stm32f7/h7: Use the DPv2 provided idcode for MCU identification.
2019-01-07 13:22:01 +13:00
525b90d4e5
cortexm: Only force halt before probe() if probe was forced.
2019-01-07 13:22:01 +13:00
da75acf015
adiv5: Only force cortexm_probe() once.
2019-01-07 13:22:01 +13:00
489f24584b
adiv5: Read TARGETID on DPv2 devices.
2019-01-07 13:22:01 +13:00
cde7726b87
cortexm: detach still needs extra cycles.
2019-01-07 13:22:01 +13:00
14bedcc441
Add support for LPC11U3X devices.
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The DeviceID register has a different address from the LPC11XX devices.
But it is shared with the LPC8XX family.
2018-10-04 08:53:05 -07:00
771d81a5f0
Fix link for windows_dfu_util
2018-10-03 15:20:09 -07:00
d8b01ff61f
swlink: Enable UART2 for SWO.
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Stlink on STM8S-Disco needs additional wiring for SWO.
2018-10-03 15:19:33 -07:00
7cafc44bd9
swlink: Allow to enable debug on second VCOM.
2018-10-03 15:19:33 -07:00
0d246fb31a
swlink: Measure voltage on VDD pin of Stlink/Stm8s.
2018-10-03 15:19:33 -07:00
184ef991bf
swlink: Handle LED.
2018-10-03 15:19:33 -07:00
06272e0a59
swlink: Implement dfu_upgrade.
2018-10-03 15:19:33 -07:00
530d1e5c28
swlink: Handle force boot on bluepill.
2018-10-03 15:19:33 -07:00
b744d8b0c9
swlink: Implement NRST.
2018-10-03 15:19:33 -07:00
1263d185a6
swlink: Distinguish between Stlink on STM8-Disco and "blue pill".
2018-10-03 15:19:33 -07:00
91dd879dac
Another nRF52 ID.
2018-09-13 16:18:29 -06:00
3a598a0cf3
Merge pull request #384 from rikvdh/feature/readable-reset-stlink
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Change the ST-Link SRST reset function
2018-09-07 08:13:48 +12:00
f5cf6d4497
adiv5_swdp: Add extra idle cycles with write transactions.
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These extra cycles are needed by some CPU, e.g. STM32L0x1 to cross the SWCLK
/HCLK domains. Revert insufficient #373 also tackling that problem.
Thanks to Thorsten von Eicken for pointing out.
2018-09-06 17:29:20 +02:00
95053b3b4e
Change the ST-Link SRST function to use libopencm3 helper functions and fix waiting for the pin-state, change init to use the SRST function for reset de-assertion
2018-09-05 20:28:02 +02:00
f39701c4c8
Move the LPC17xx probe function down since it performs an IAP call which can hang when performed on other devices than a LPC17xx
2018-09-05 17:40:02 +02:00
c5c0783337
Merge pull request #378 from markrages/nordic_unlock
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Add extra port for mass erasing / unprotecting nRF52 with APPROTECT set.
2018-07-28 14:56:03 +12:00
d0a8ce0819
Add extra port for mass erasing / unprotecting nRF52 with APPROTECT set.
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Mostly copied from the equivalent in kinetis.c and
https://devzone.nordicsemi.com/f/nordic-q-a/12484/approtect-and-dap/47301
2018-07-27 16:07:19 -06:00
6fd3ede5c7
Merge pull request #377 from markrages/add_id_2
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Another chip ID for Nordic nRF52832.
2018-07-28 09:53:00 +12:00
cb8596b0b2
Another chip ID for Nordic nRF52832.
2018-07-27 15:09:14 -06:00
5918608156
STM32F7: Debug does not work with WFI without DBG_SLEEP
2018-07-27 10:59:54 +02:00
2c1c913213
adiv5.c: Add units found on M7.
2018-07-27 10:59:54 +02:00
f234074099
stm32h7: Start of support.
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Implement probe, memory map, erase, write, uid, crc, parallelism.
2018-07-27 10:59:54 +02:00
a988bba035
Merge pull request #372 from richardeoin/efm32-1
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[efm32] Add support for EFM32 devices with different DI and MSC layouts
2018-07-27 11:41:58 +12:00
d7b173ab39
Merge pull request #310 from UweBonnes/stm32l4r
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arget/stm32l4.c: Add stm32l4r series and clean up.
2018-07-27 10:32:00 +12:00
b4dc666aca
Add nRF52 QIAA C0
2018-07-26 23:13:38 +01:00
4a312c7697
target/stm32l4.c: Add stm32l4r series and clean up.
2018-07-22 15:44:00 +02:00
7034d0bb94
stm32l4: Option byte loader must be started with flash unlocked!
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Warn user that device will loose connection.
2018-07-22 15:44:00 +02:00
83f9655f6e
stm32l4: Fix wrong default for WRP2A option halfword.
2018-07-22 15:44:00 +02:00
139707c5c0
cortexm/detach: Add a dummy transaction after cleaning DHCSR.
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This replaces the seemingly superflous swdptap_seq_out() at
the end of adiv5_swdp_low_access() needed to continue after detach.
2018-07-19 10:57:41 +02:00
a7106bd346
[efm32] Add support for flashing User Data (UD) and Bootloader (BL) regions
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* UD region on all devices, some devices also have BL region
* Fix page size for EZR32HG
2018-07-18 08:57:01 +00:00
55bb96cfdb
[efm32] tidy compiler warning
2018-07-16 20:47:24 +00:00
98faaceb70
[efm32] Add support for EFM32 devices with different DI and MSC layouts
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* DI layout is identified by attempting to read OUI from both layouts
* MSC address is passed to flashstub in r3
Retested EZR32LG230 (EZR Leopard Gecko M3)
Tested EFR32BG13P532F512GM32 (EFR Blue Gecko)
Achieves aims of PR #264 (I think) Thanks to @dholth and @ryankurte for inspiration
Fixes Issue #226
2018-07-16 20:18:36 +00:00
59d6eca8f0
Fixes option erase for STM32F070x6 STM32F070xB STM32F030xC
2018-07-10 18:44:05 +03:00
c5713ea8d3
Merge pull request #366 from UweBonnes/f7_fix
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stm32f4.c: F76x also has large sector by default.
2018-07-07 13:03:14 +12:00
1b51c4961e
Merge pull request #363 from korken89/master
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Removed debug bits for F4/F7 target, same as all other MCUs now
2018-07-07 13:01:05 +12:00
50514ccc31
stm32f4.c: F76x also has large sector by default.
2018-07-05 13:29:43 +02:00
5e8c8cae10
Removed debug bits for F4/F7 target, same as all other MCUs now
2018-06-28 16:31:34 +02:00
7a7266a0f7
Speed up JTAG.
2018-06-26 19:50:14 +02:00
59e03dea27
Keep TMS floating until scanning.
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NRF5x shares nRST with SWDIO and otherwise does not run until scan is done.
2018-06-26 19:50:14 +02:00
97561fc5cc
stlink: Decrease delay with SWD turn around for native,stlink and swlink.
2018-06-26 19:50:14 +02:00
5548d54626
common/swdptap: some clean up.
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Remove superfluous transaction.
Use native variable size.
2018-06-26 19:50:14 +02:00
7e3fe352ad
adiv5_swdp.c: Use swdptap_seq_out for initialiation sequence.
2018-06-26 19:50:14 +02:00
e54a826745
common/swdptap.c: Speed up by "unrolling" swd.._seq_...() for GPIO.
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Try to have sensible setup/hold times by evenntually duplicated or
logically useless port commands.
Loading code to RAM on a STM32L476 got up from 46 to 83 kB/sec.
2018-06-26 19:50:14 +02:00
633af5bb85
libftdi/jtagtap.c: Fix error introduced with commit de33473
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Seen when scanning e.g. Zync with mon jtag 6 4.
2018-06-26 17:43:06 +02:00
b2defad844
Merge pull request #356 from UweBonnes/probe_halted
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Probe halted
2018-06-21 10:06:56 -07:00
b59bbac0b2
stm32l4: Use buffered direct write to flash.
2018-06-16 13:30:53 +02:00
891d6de8eb
stm32f1.c: Use buffered direct write to flash with half word access.
2018-06-16 13:30:53 +02:00
f1752c7a1a
stm32f4: Allow DWORD parallelism.
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Needs external VPP!
2018-06-16 13:30:53 +02:00
15312eb86c
stm32f4: Honor parallelism also for erase.
2018-06-16 13:30:53 +02:00
bfeb6f0db9
stm32f4: Use buffered direct flash write with choosen size.
2018-06-16 13:30:53 +02:00
54f73858f9
Provide a target function to write with given size.
2018-06-16 13:30:08 +02:00
17b817f37b
cortexm: Allow to set timeout to wait for halt.
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This allows to gain access to devices spending long time in WFI without
the need for a reset, at the expense of possible long waiting times.
Using Reset means loosing the device runtime context.
2018-06-13 14:03:50 +02:00
9e365a58f7
Cortex-M: Try harder to halt devices in WFI.
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E.g. STM32F7 and L0 need multiple C_DEBUG and C_HALT commands to halt
the device.
2018-06-13 14:02:43 +02:00
44fc24e0e7
Allow to specificy if SRST is asserted and when it is released.
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E.g. for STM32L0 and F7, IDCODE register can not be read while device is
under Reset.
2018-06-13 13:46:07 +02:00
66e357d517
Cortex-M: Probe Cortex-M even if ROM table read fails.
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Rom table in some devices (e.g. STM32L0/F7) can not be read while
device is in WFI. The Cortex-M SWD signature is however available.
If we know by that signature, that we have a Cortex-M, force a
probe for Cortex-M devices.
2018-06-13 13:04:17 +02:00
ae6f0eadc9
Support for MSP432 TI MCUs ( #353 )
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Introduces flashing and debugging support for Texas Instruments MSP432
series of MCUs
2018-06-07 08:34:21 +12:00
077e455a94
Setting the driver string on scan.
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This way swdp_scan and jtag_scan commands will show the chip that was
detected instead of the generic STM32F4 string. The generic name is
most confusing when attaching to an STM32F7 target.
2018-06-01 12:46:14 -07:00
2657aa6fbb
libftdi: Allow more flexible Swd Read/Write Switching.
2018-05-30 19:21:03 +02:00
df05d7ce7b
libftdi: Allow device specific port/pin to read SWD bitbanged.
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Gracefully abort swd scan if devices can not do SWD.
Best effort to indicated SWD capability on existing cables and
add descriptions for the cables.
2018-05-30 19:21:03 +02:00
fce25b9fd5
libftdi/swdptap.c: Substantial speed increase for bitbanging SWD.
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Provide the swd sequences unrolled.
2018-05-30 19:21:03 +02:00
992ccf91a9
libftdi/swdptap.c: Use MPSSE Mode for bitbanging SWD.
2018-05-30 19:21:03 +02:00
f3cacba219
libftdi: Flush buffer with detach.
2018-05-30 19:21:03 +02:00
2ec078cfcf
libftdi/jtagtap.c: Allow NULL as one DI/DO argument jtagtap_tdi_tdo_seq.
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Implement jtagtap_tdi_seq() by calling jtagtap_tdi_tdo_seq().
2018-05-30 19:21:03 +02:00
de33473535
libftdi/jtagtap: Copy DI direct into the write buffer.
2018-05-30 19:21:03 +02:00
aa938c6dae
libftdi/jtagtap: Try harder to initialize Ftdi MPSSE jtag mode.
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After "mon s" at least the second "mon j" now succeeds again.
2018-05-30 19:21:03 +02:00
c548e307fe
libftdi/jtagtap: Clean up code.
2018-05-30 19:21:03 +02:00
7d45bd4869
ibftdi/jtagtap: Remove magic numbers.
2018-05-30 19:21:03 +02:00
6f0a46d9c1
libftdi: Export active cable description.
2018-05-30 19:21:03 +02:00
68c7180376
libftdi: Add ftdiswd variant.
2018-05-30 19:21:03 +02:00
f4bc6f9ddd
libftdi/platform.c: Issue SEND_IMMEDIATE before reading.
2018-05-30 19:21:03 +02:00
744deb678d
libftdi/platform.c: Only set bit direction with MPSSE SET_BIT_XXXX.
2018-05-30 19:21:03 +02:00
48d232807e
Merge pull request #337 from adamgreig/stm32f4-ram-size
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Update maximum RAM sizes for F4 and F7 devices
2018-04-26 13:38:11 +12:00
e1cefb2031
Update maximum RAM sizes for F4 and F7 devices
2018-04-24 11:06:07 +01:00
93f3b14b68
stm32f1(f0): Do not read normal device registers during probe.
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Device may not be halted and memory map setup may fail.
2018-04-23 11:06:08 +12:00
a0596a0dcc
stm32l4: Build Memory Map during attach.
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Reading target registers while target not halted may fail and result in
invalid memory map.
2018-04-23 11:06:08 +12:00
5f404cdbc0
Construct memory map on the stack
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The memory map uses 1k of SRAM and is only needed during attach. Release
after use lowers pressure on SRAM.
2018-04-23 10:51:04 +12:00
6127a6431e
stlink: Check nRST line level when setting SRST.
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Problem: On some boards flashing hanged.
Cause: Releasing SRST caused a slow rise of nRST and flashing
started while the target still was in reset.
Attention: platform_delay(ms) only resolved 0.1 s.
Nucleo-P boards have SRST unconnected to target nRST by default.
2018-04-23 10:48:05 +12:00
63967346cd
stm32f4: Don't duplicate resources on reattach.
2018-04-23 10:48:05 +12:00
00decb3718
target: Separate function to free memory map.
2018-04-23 10:48:05 +12:00
1fd2a24c2d
stm32f4: Only construct memory map at attach.
2018-04-23 10:48:05 +12:00
72c1498ae1
stlink: Make SWO Trace Buffer smaller.
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Changes for delayed memory map setup otherwise overflow SRAM silently.
2018-04-23 10:48:05 +12:00
9d7925792f
Merge branch 'master' into always_buffer_flash
2018-04-23 10:40:20 +12:00
28bd4fc0ce
Merge pull request #305 from UweBonnes/swo_async
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Use async SWO from the bluepill pull request.
2018-04-09 08:27:49 +12:00
fa62403ee3
nrf51: Add nRF51802 device id. ( #331 )
2018-04-03 10:45:56 +12:00
fc25a3339a
traceswoasync: Implement async swo for stm32.
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Use for stlink.
Uses dma with large buffer.
Pull up swo to provide idle level on unconnected swo pin.
2018-03-27 13:40:49 +02:00
93bc3a155a
traceswo: Provide command option for async swo.
2018-03-27 13:40:49 +02:00
Uwe Bonnes
Ingmar Jager
Josh Robson Chase
Ingmar Jager
Benjamin Vernoux
Mark Rages
Gareth McMullin
Rik van der Heijden
Mike Walters
Richard Meadows
Antti Louko
Emil Fresk
newbrain
Piotr Esden-Tempski
Adam Greig