Commit Graph

40 Commits

Author SHA1 Message Date
Rafael Silva 013b2dee60 target/adiv5: further cleanup 2022-07-25 18:28:57 +01:00
Rafael Silva 0942d7047a target/adiv5: saner designer code handling and cleanup
Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
2022-07-25 18:28:57 +01:00
Rafael Silva d1fa50336e target/adiv5: clang format/tidy 2022-07-25 18:28:57 +01:00
dragonmux 10d30821e5 swdptap: Cleaned up the naming and and signatures of the SWDP implementation functions 2022-07-18 18:57:10 -07:00
Uwe Bonnes 80c98df2f9 stm32wxxx: CPU2 needs wake-up call and has unexpected PIDR4 in AP1
"Single" core  STM32WLE still sees AP1 but on first scan aborts gracefully
after some errors and on later runs sees AP1 as unusable. Fixes #832.

Decode the Cross trigger interface found on CPU2 on STM32WBxx.
2022-06-25 16:52:36 -04:00
dragonmux d1c9d94174 jtag_scan: Remove the now redundant IDCode parameter from the handlers 2022-03-14 21:37:44 -07:00
dragonmux 7d2afcff06 Revert "jtag: Make jtag_devs argument to jtag_handler."
This reverts commit 6308506276.
2022-03-14 21:37:44 -07:00
dragonmux 02d9a1d3cf Revert "jtag_scan: Rework chain detection"
This reverts commit 2d4a503135.
2022-03-14 21:37:44 -07:00
Uwe Bonnes 88e44d1c12 cmsis: use exception in wait_word(). 2021-10-31 12:55:41 +01:00
Uwe Bonnes 4f36c1ddf8 Remove dp_low_read() and use exception protected dp_read() 2021-10-31 12:55:41 +01:00
Uwe Bonnes c13778139f adiv5/hosted: Export the BMP_TYPE in DP. 2021-10-31 12:55:41 +01:00
Uwe Bonnes dd28fa5743 adiv5: Tighten up loop to initial halt cortexm
Use TRNCNT when available.

Now the F767 with the NutOS 300 ms sleep example  with the one ms tick is
halted even in hosted after few ms.
2021-09-04 21:15:07 +02:00
Uwe Bonnes 6308506276 jtag: Make jtag_devs argument to jtag_handler. 2021-08-15 16:43:29 +02:00
Uwe Bonnes 2d4a503135 jtag_scan: Rework chain detection
Fixme: stlinkv2/hosted probably does only handle STM devices. Check if
jtag_devs.c really needed.
2021-08-15 16:43:29 +02:00
Uwe Bonnes 0c63903071 adiv5: Recover from bad AP access.
E.g. AP1 on a STM32WLE5 points to a ROM table, but access to the ROM table
via AP1 hangs forever.
- Substantial reduce timeout when wait for a response. Valid access should
  succeed fast.
- Abort AP access to free DP for other accesses
- Don't throw exception, only set dp->fault
- React on higher level
2021-07-15 15:06:54 +02:00
Uwe Bonnes 23f942ac8c Raspberry RP2040: Recognize. No flash handling yet. 2021-04-21 21:50:35 +02:00
Uwe Bonnes 04d1c9805b swd: Remove swd_proc and swdptap.h. 2021-04-21 21:50:04 +02:00
Uwe Bonnes b6fbf86743 Extend ADIv5_DP_t for low level routines needed for multi-drop.
Will replace swd_proc
2021-04-21 21:50:04 +02:00
Uwe Bonnes fa561c8d66 adiv5_swdp: Starting point to handle multi-drop
- RP2040 show both DPs
- Multidrop test with STM32L552 and STM32H745 allows selection
  with "-m 0x4500041" (H7), "-m 1" (L552) or "-m 0x01002927" (RP2040)
2021-04-21 21:50:04 +02:00
mean e3fd12ebc6 gd32f1/f3 detection and ram/flash autoset 2020-12-03 11:16:47 +01:00
Jonathan Giles 575c25e570 Add support for STM32F1 clone with new AP_DESIGNER id 2020-12-01 10:23:16 +01:00
Uwe Bonnes 8b929c12c9 hosted/jtag: Transfer jtag_devs to firmware. 2020-10-16 20:03:03 +02:00
Uwe Bonnes 3d92b82678 jtag: Use index and not device structure for jtag_dev_write_ir and jtag_dev_shift_dr 2020-10-16 20:03:03 +02:00
Uwe Bonnes 877b4be8ee cortexm: Restrict probing by using the ap_designer.
More designers need to be observed and reported by users and added.
Request users to send needed data.
2020-10-07 20:12:35 +02:00
Uwe Bonnes 91d1ef8bf6 target/stm32: Use t->idcode with probe. 2020-10-07 20:12:35 +02:00
Uwe Bonnes c456fc7f61 adiv5: Store AP designer and partno in the AP structure. 2020-10-07 20:12:32 +02:00
Uwe Bonnes 9bb2807706 adiv5/romtable: Prepare CortexM devices to read the ROMTABLE
It seems, writing to DHCSR fails silent when the device is sleeping.
Reading DHCS during sleep may return nonsense.
Repeated write may at some point catch the device running and succeed.
With devices sleeping for long time and running on faster clock the
chance for a successful hotplug gets smaller.

- Try hard to halt a sleeping device
- Prepare vector catch and enable all debug units by TRACENA
- Release reset
- Apply device specific fixes
-- STM32F7: Store old value of DBGMCU_CR, enable debug in sleep in
   DBGMCU before reading PIDR and restore DBGMCU on detach.

Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
2020-10-07 20:11:17 +02:00
Uwe Bonnes 64f3dff8a8 PC-Hosted: Better debug output. 2020-06-05 14:59:30 +02:00
Valmantas Paliksa b06c0ba8d5 bmp_remote: Use high level functions.
Based on #570 (OpenOCD HLA interface driver for Blackmagic), but now
usefull for bmp-remote.
2020-06-05 14:59:30 +02:00
Uwe Bonnes 563df2d354 Detour ADIv5 high-level functions. 2020-06-05 14:59:30 +02:00
Uwe Bonnes 9969c984f3 detour jtag primitives. 2020-06-05 14:59:30 +02:00
Uwe Bonnes 783ec377d9 adiv5: Export extract. 2020-06-05 14:59:30 +02:00
Uwe Bonnes 16967b4328 adiv5: Remove only local dp_idcode used from ADIv5_DP_t struct. 2020-06-05 14:59:30 +02:00
Uwe Bonnes b8b34e7b1d adiv5: remove cfg for AP structure, cfg is only used local. 2020-06-05 14:59:30 +02:00
Uwe Bonnes c4d7232223 Export function to read out PIDR and use for samd and samx5x. 2020-03-26 19:05:57 +01:00
Uwe Bonnes a0e42e229b Make more things static.
No functional change intendend.
2020-03-26 18:44:19 +01:00
Richard Meadows 61e9607594 [adiv5] Improvements in ADIv5
* Reference latest version of the ARM specification
* ROM tables - more debug information, including printing SYSMEM bit
* MEM-AP - reject when Debug Base Address entry is not
  present/invalid. These would only have errored in
  adiv5_component_probe.
* Fix maximum number of entries in Class 0x1 ROM Table to 960. See ARM
  IHI 0031E Table D3-1 ROM Table register summary.
* Resolve note in STM32H7 driver with explaination

blackmagic PR #474
2019-05-24 22:00:44 +02:00
Uwe Bonnes 489f24584b adiv5: Read TARGETID on DPv2 devices. 2019-01-07 13:22:01 +13:00
Uwe Bonnes 54f73858f9 Provide a target function to write with given size. 2018-06-16 13:30:08 +02:00
Gareth McMullin b494279fe5 Move target files into separate directory. 2016-07-13 08:31:09 +12:00
Renamed from src/include/adiv5.h (Browse further)