Triss
9269d22d2b
chipinfo db: fix entries
2022-05-19 01:48:22 +02:00
Triss
43f9d7bc54
v3hil: handle new protocol versions
2022-05-19 01:48:19 +02:00
Triss
c375f74c51
v3hil: add debug logging
2022-05-19 00:46:45 +02:00
Triss
9484b1cff6
hal_proto, v3hil: add missing command and status IDs
2022-05-19 00:21:45 +02:00
Triss
9d1a2528de
hal_proto: handle acknowledgement packets correctly
2022-05-19 00:10:47 +02:00
Daniel Beer
5284713769
Merge pull request #116 from LucasSnatiago/master
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[feat] added Arch commands
2022-03-21 15:55:37 +13:00
Lucas Santiago
6332574323
[feat] Arch commands
2022-03-20 10:30:18 -03:00
Daniel Beer
4858be123c
Merge pull request #114 from sorber/fix-hidapi-bug
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fixed hidapi compile bug, missing vid/pid arguments
2022-02-13 18:35:03 +13:00
Jacob Sorber
7283b49e13
fixed hidapi compile bug, missing vid/pid arguments
2022-02-11 08:21:27 -05:00
Daniel Beer
e39ff3c1d9
Merge pull request #112 from chrissphinx/master
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generalize x86-specific trap instruction
2022-01-25 10:14:33 +13:00
chrissphinx
f2f763b043
remove statement leftover from debugging
2022-01-24 14:48:30 -05:00
Triss
a1a06e7e65
jtaglib: fix register reading on MSP430G2452 and similar chips
2021-10-11 12:34:59 +02:00
Triss
30af3e9483
mehfet: add driver and transport
2021-10-11 12:34:50 +02:00
Triss
ab76a0ef3c
jtaglib: refactor: allow driver backends to implement higher-level IR/DR-shifts, TMS-sequence, etc. commands instead of requiring a bit-banging interface
2021-10-10 00:05:50 +02:00
Triss
c576441fb7
add -V option to specify/override VID and PID of USB device
2021-10-10 00:05:43 +02:00
Hose wie Jacke
4c4d94e43b
simio/tracer: fix output format
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This commit adds ":" after "SMCLK".
Previous output:
MCLK: ...
SMCLK ...
ACLK: ...
Current output:
MCLK: ...
SMCLK: ...
ACLK: ...
2021-05-12 10:01:45 +12:00
Daniel Beer
66dd71e62d
Merge pull request #103 from w0xel/hotfix/rodata2-init-array-section
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elf32.c: Extract and flash INIT_ARRAY sections
2021-03-11 11:57:12 +13:00
Sebastian Würl
1633ed504a
elf32.c: Extract and flash INIT_ARRAY sections
2021-03-08 12:57:05 +01:00
Daniel Beer
6740d7d98b
simx: MSP430X simulator by Bruce Burns <bgb@alum.mit.edu>
2020-09-05 14:56:37 +12:00
Daniel Beer
e65bc6910a
Merge pull request #95 from iddq/master
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fix jtag_read_reg and jtag_write_reg functions according to the docum…
2020-06-02 09:22:38 +12:00
iddq
0c5f33ec42
fix jtag_read_reg and jtag_write_reg functions according to the documentation: SLAU320 MSP430 Programming via JTAG User's Guide
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tclk set and clr was in wrong order
2020-06-01 06:56:52 +02:00
Daniel Beer
493f38bb85
Merge pull request #93 from WeilunFong/master
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Add uninstall phony target for Makefile
2020-04-02 10:27:59 +13:00
WeilunFong
cbe5fccb9c
Add uninstall phony target for Makefile
2020-03-31 01:02:53 +08:00
Daniel Beer
0efcf40f4d
Merge pull request #92 from tgtakaoka/update-chipinfo-mspds-3.15.0.1
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Update chipinfo.db with MSPDS-OPEN-SOURCE_3.15.0.1
2020-03-18 10:03:39 +13:00
Tadashi G. Takaoka
f8852df217
Update chipinfo.db with MSPDS-OPEN-SOURCE_3.15.0.1
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The chipinfo.db is extracted from MSPDS.
https://www.ti.com/tool/download/MSPDS-OPEN-SOURCE
The latest is MSPDS-OPEN_SOURCE_3.15.0.1.
http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPDS/3_15_0_000/export/MSPDebugStack_OS_Package_3_15_0_1.zip
You can find the release note of version 3.15.0.1 at
http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPDS/3_15_0_000/export/Release_Notes.html
The following msp-ds-dumpdb.patch is necessary to extract chipinfo.db
from MSPDS, using msp-ds-dumpdb command.
https://raw.githubusercontent.com/tgtakaoka/homebrew-mspdebug-mspds/master/patches/msp-ds-3.15.0.1-dumpdb.patch
2020-03-16 23:27:16 +09:00
Daniel Beer
b506542094
Merge pull request #90 from Mauroq/master
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Support files for FR5994 (Launchpad) and FR5964
2019-11-05 09:39:19 +13:00
Dennis de Lange
713541525c
Added the FR5994 and FR5964 chips (based upon the FR5968)
2019-11-04 11:28:26 +01:00
Dennis de Lange
51ef323568
Included missing devices from fet_db into devicelist. See 2b4b409
2019-11-04 10:12:07 +01:00
Daniel Beer
fb29ec1236
gdb: fix parsing of register values.
2019-10-22 11:35:00 +13:00
Daniel Beer
eb77903392
Merge pull request #88 from thiloschulz/master
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Increase limit on number of ELF program / section headers
2019-09-21 10:07:57 +12:00
Thilo Schulz
4f21d592f3
Increase limit on number of ELF program / section headers
2019-09-20 16:21:39 +02:00
Daniel Beer
4f6a845fb4
Fix operation size error in instruction decoding.
2019-03-28 14:26:28 +13:00
Daniel Beer
d59fb64ac2
Don't issue mass erase if BSL password is specified.
2019-03-12 12:16:35 +13:00
Daniel Beer
5c5fec9acd
rom_bsl: fix incorrect use of sizeof().
2019-03-10 15:19:41 +13:00
Daniel Beer
989038d3b3
Implement --bsl-entry-password option.
2019-03-08 08:46:16 +13:00
Daniel Beer
3bc5cb2686
simio: fix uninitialized memory use in IO reads.
2018-11-28 08:44:49 +13:00
William D. Jones
66dc9057e2
Improve compiling experience on MinGW platform (use pkg-config, *nix rm).
2018-11-18 14:49:08 -05:00
Daniel Beer
b975fd00a0
Merge pull request #76 from melak/tilib_path_facelift
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Facelift MSPDEBUG_TILIB_PATH handling
2018-09-17 16:34:14 +12:00
Tamas TEVESZ
be0f7b4576
Facelift MSPDEBUG_TILIB_PATH handling
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Yes, I primarily just want to get rid of strcat (which is checked and
appears to be OK, but still, it's 2018).
Also bring behaviour in line with manual and common expectations:
- In absence of MSPDEBUG_TILIB_PATH, the dynamic linker search
path is processed
- If MSPDEBUG_TILIB_PATH is specified, that directory is searched
- The original behaviour in case of an error is graceful fall-through
to letting the dynamic linker do its deed
- The behaviour is changed such that if MSPDEBUG_TILIB_PATH is specified,
only that path is being considered.
This is in line with both manual and common sense (otherwise one
could have just used LD_LIBRARY_PATH).
2018-09-16 10:36:23 +02:00
Daniel Beer
457c0c3f00
Merge pull request #73 from DanielO/msppath
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Look for an env var to help find the MSP430 library
2018-08-25 11:57:43 +12:00
Daniel O'Connor
ea1b0ee7c9
Add manual page notes for MSPDEBUG_TILIB_PATH.
2018-08-24 14:08:04 +09:30
Daniel O'Connor
97e5cb63aa
Change name of variable to MSPDEBUG_TILIB_PATH to match existing style.
2018-08-24 14:04:52 +09:30
Daniel O'Connor
a2c48ed345
Don't use asprintf as it may not be available on all platforms.
2018-08-24 14:02:50 +09:30
Daniel Beer
44f31b27a5
Merge pull request #72 from DanielO/master
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Detect macports to find hidapi and libusb.
2018-08-16 08:25:32 +12:00
Daniel O'Connor
65c0e5a440
Look for an env var to help find the MSP430 library
2018-08-15 13:42:21 +09:30
Daniel O'Connor
6c82bbf017
Detect macports to find hidapi and libusb.
2018-08-15 13:33:55 +09:30
Daniel Beer
f017df6781
Merge pull request #69 from tgtakaoka/simio-timer-b
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[simio] support Timer_B
2018-07-23 13:20:09 +12:00
Tadashi G. Takaoka
8564f42b66
[simio] support Timer_B compare latch grouping
2018-07-22 21:39:29 +09:00
Tadashi G. Takaoka
c53f697b76
[simio] support Timer_B compare latch double-buffering
2018-07-21 16:55:12 +09:00
Tadashi G. Takaoka
f9f897e95e
[simio] support Timer_B
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Timer_B is identical to Timer_A with the following exceptions.
1. The SCCI bit function is not implemented in Timer_B.
2. The interrupt vector word of TBIFG is different than TAIFG one.
3. The length of Timer_B is programable to be 8, 10, 12, or 16 bits.
4. Timer_B TBCCRx registers can be double-buffered.
5. Timer_B TBCCRx registers can be grouped.
This change implements 1, 2, and 3.
Double-buffering and grouping TBCCRx will be following.
2018-07-21 16:55:08 +09:00