Commit Graph

917 Commits

Author SHA1 Message Date
Uwe Bonnes dd3cb193f3 Indicate the Core in the Target list. 2019-07-17 17:38:21 +02:00
Uwe Bonnes c44cb904b0 adiv5.c: Format debug output more tense. 2019-07-17 17:38:21 +02:00
Uwe Bonnes 205fce20e5 stlinkv2: mem_[read|write] needs to honor AP. 2019-07-17 17:38:21 +02:00
Uwe Bonnes 634c07c432 adiv5: Add TSGEN. 2019-07-17 17:38:21 +02:00
Uwe Bonnes 82424b100b stlinkv2: Require STLINK V3 Rev > 2 as revision 1 can not read TARGETID. 2019-07-17 17:38:21 +02:00
Uwe Bonnes 9b764534e6 stlinkv2: Recognize Stlink V3E 2019-07-17 17:38:21 +02:00
Uwe Bonnes 3388e48d92 stlinkv2: Do not loop endless when Read DP fails. 2019-07-17 17:38:21 +02:00
Uwe Bonnes 9ed26645d3 Add pc_stlinkv2 platform, running on host, talking to original StlinkV2/3.
Stlink firmware needs to be recent.
2019-07-17 17:38:01 +02:00
Uwe Bonnes fd3af639b0 Clean up some includes.
Includes #465, noticed by Sid Price.
2019-07-17 17:26:00 +02:00
Uwe Bonnes 32d2b2c4bf jtag: Move device list to it's own file to allow reuse. 2019-07-17 17:26:00 +02:00
Uwe Bonnes bd530c8951 adiv5.c: Make functions weak where high level platforms may implement different. 2019-07-17 17:26:00 +02:00
Uwe Bonnes 5aebef4f64 Makefile: Indicate high level SWD/JTAG implemenatation. 2019-07-17 17:26:00 +02:00
Uwe Bonnes 3b75cb9a5a gdb-server: Allow multiple instance. 2019-07-17 17:26:00 +02:00
Uwe Bonnes 9075411c93 Move gdb_if.c for stand-alone servers to common. 2019-07-17 17:26:00 +02:00
Uwe Bonnes df7458e35a Build-Infrastructure: Allow a different target name. 2019-07-17 17:26:00 +02:00
Stephen Roe b4c680bb15 Add STM32G4
Based on #488 Stephen Roe, done as #491.
Fixes ID of STM32G03.
2019-07-17 17:24:23 +02:00
Simon Rasmussen 5a7ffe7a40 Fixed SAM3X8C large file flashing.
The datasheet specifies the EEFC_BASE(0) is at `0x400E0A00` and EEFC_BASE(1) is at `0x400E0C00` which means they're spaced 0x200 bytes apart rather than 0x400.
2019-07-17 14:37:07 +02:00
David R. Piegdon 02b2fdb2ae fix overwriting of still-needed value (refs #487)
this fixes a bug that was introduced in blackmagic PR #475 which lead to
firmware crashes when connecting to a BMP more than once without a
power-cycle.
2019-06-24 16:45:18 +02:00
Uwe Bonnes 589d297d20 stm32l0: Fix crash when only "monitor option" was requested.
PR #485
2019-06-12 12:54:29 +02:00
Alexander Zhang 880613d641 lpc_common: restore RAM and registers after IAP call
Restore the RAM and registers which are clobbered by an LPC IAP call.
This does not restore any additional RAM which might be clobbered
by a *particular* IAP call. (For example, flash programming always
clobbers the last page of RAM.)
2019-05-30 14:01:27 -04:00
David Lawrence d3979a57b6 Add LPC command to read out unique ID from target.
This commit modifies lpc_iap_call() to work with IAP commands that
return additional data. If the "result" argument is non-null, 16
bytes of data (the maximum returned by any IAP command) are copied
to the specified address.
2019-05-30 14:01:12 -04:00
Sid Price 21434d6fbb Remove redundant include file 2019-05-26 23:27:32 +02:00
Richard Meadows 600bc9f029 Generate DEBUG warnings and return if `malloc`/`calloc` fail.
This is will make debugging earier if this does happen, rather than
dereferencing the null pointer (or passing it to memcpy, or worse).

blackmagic PR #475
2019-05-26 18:56:12 +02:00
Richard Meadows 61e9607594 [adiv5] Improvements in ADIv5
* Reference latest version of the ARM specification
* ROM tables - more debug information, including printing SYSMEM bit
* MEM-AP - reject when Debug Base Address entry is not
  present/invalid. These would only have errored in
  adiv5_component_probe.
* Fix maximum number of entries in Class 0x1 ROM Table to 960. See ARM
  IHI 0031E Table D3-1 ROM Table register summary.
* Resolve note in STM32H7 driver with explaination

blackmagic PR #474
2019-05-24 22:00:44 +02:00
Uwe Bonnes 703f88a969 gdb_main: Always release CPU when detaching.
Fixes Issue #413 and released as PR #477.
2019-05-23 13:17:54 +02:00
Richard Meadows 24a7b8b2bf [stm32h7] add revision command which reads the `DBGMCU_IDC` register
blackmagic PR #476
2019-05-21 23:20:13 +02:00
Richard Meadows c336c300a3 [stm32h7,bugfix] Fix bug: target_add_flash called in attach
When `target_add_flash` or `target_add_ram` are called in an attach
function they may be added multiple times. This very much confuses
GDB. This issue has already been reported and fixed for `stm32l4` (See
Issue #455 ).

`stm32f4` and `stm32l4` are the only other cortexm drivers that
implement this pattern. These are both fine.
2019-05-21 22:38:16 +02:00
Uwe Bonnes 984813a29d Add Stm32G03 from reference manual Rev.2
Not yet tested on a real part.
2019-04-24 12:29:58 +02:00
Sid Price 2108bb7137 Native Windows builds
All except hydrabus and launchpad-icdi building in PowerShell.
2019-04-07 10:26:45 -06:00
UweBonnes 302ff20a6d
Merge pull request #434 from UweBonnes/nrf5
Nrf5
2019-03-21 19:43:29 +01:00
Jeremy Elson 3235fa2005 Improve parsing of commands that require enable or disable arguments:
* Accept prefixes of the words 'enable' and 'disable'
* Prevent silent failures on parse errors
* Print status after flag changes
* Fix missing includes
2019-03-19 12:56:44 -07:00
Boris Sorochkin 691ada17e9 Implement read device info for NRF5x 2019-03-10 21:45:47 +01:00
Uwe Bonnes 3f89fed32e nrf51: Use buffered direct write to flash. 2019-03-10 21:45:47 +01:00
Uwe Bonnes 4ecd13a9a3 nrf51: Fix crash with not argument given to "mon read". 2019-03-10 21:45:47 +01:00
Uwe Bonnes db2f403417 sam4l: Remove noisy debug message. 2019-03-10 21:45:47 +01:00
Uwe Bonnes a336ac2084 NRF5: New detection scheme. 2019-03-10 21:45:47 +01:00
newbrain 6887628eaa Correction of #445 attach-detach problem
Memory map is now completely freed and rebuilt in the separate attach
function.
It was previoulsy split beween probe and attach and never released,
causing problems when reattaching to the same target.
2019-03-03 15:55:40 +01:00
UweBonnes da62cbaa3d
Merge pull request #449 from jelson/width-fix
Use 32-bit variable for 32-bit read
2019-02-25 13:21:55 +01:00
Jeremy Elson 86ed86c2a2 Use 32-bit variable for 32-bit read. (Also fixes DEBUG compile
error due to mismatch of format and argument.)
2019-02-24 17:49:30 -08:00
Uwe Bonnes 56fb0f7766 Handle STM32F730 and STM32H750.
Flash sector calculation was wrong with small flash sizes.
2019-02-21 19:19:10 +01:00
anyn99 3f8c40d3f5 Fixing stm32l4 target to allow probing w/o halting 2019-02-21 18:06:38 +01:00
newbrain 8de1b45c85 Kinetis KE04: Flash and debug support
Support for Kinetis KE04 8KiB, 64KiB and 128KiB variants in nxpke04.c
Target monitor commands for sector and mass erase.
Changes to kinetis.c MDM-AP target to support KE04.
Only KE04Z8 tested in HW.
2019-02-17 22:48:23 +01:00
Carl 02c1934c03 Added ability to lock and unlock boot rom for samd controllers 2019-02-13 16:33:07 -08:00
Uwe Bonnes a6b75bb4ef Makefile: Add -Wnocast-function-type for compilation on gcc8.
Older GCC versions do not warn for disabled warnings they do not know yet.
This is needed to compile with gcc8.
2019-01-16 23:17:17 +01:00
Richard Meadows 0b28232f72 [efm32] Assume Device Identification (DI) version 1 if we don't know the OUI (#402)
* [efm32] Assume Device Identification (DI) version 1 if we don't know the OUI

Silabs are using some additional OUIs we don't know about. Reported in issue #389
These should use a DI version 1 layout, so assume version 1 layout for OUIs we don't
know. However do print a notice about this on DEBUG() as suggested by @UweBonnes

The IDCODE value is sufficient to make a positive identification of an EFM32 device.
See AN0062 Section 2.2. Therefore accepting any OUI is reasonable behaviour.
Additionally the part familiy is checked, and the target rejected if not in the
`efm32_devices` table. This commit makes that rejection explicit, although it does
not change the logical behaviour here.

Note that the important registers (part number, part family, flash size) are at the
same addresses in both layouts anyhow. Currently only `efm32_cmd_serial` and
`efm32_cmd_efm_info` functions use registers that differ between DI versions.

* [efm32] tidy format warning about portability UB

* [efm32] Simplify OUI checking

* Only read the OUI once
* Accept the device even if the OU is unknown, as silabs have been using
  a variety of OUIs
* Perform fewer register reads before checking the device family is valid
2019-01-16 09:58:59 +13:00
Uwe Bonnes 7cc02867ae stm32f4: Fix problems with small flash sizes creating overflow or empty regions.
Thanks to "DerMeisteRR" for pointing out.
2019-01-09 12:23:49 +01:00
Uwe Bonnes 47fad2bf7f Add Stm32L41x. 2019-01-09 12:23:49 +01:00
Uwe Bonnes f0c6e2bbd2 Add STM32G07x. 2019-01-09 12:23:49 +01:00
Uwe Bonnes 0793dac2cf libftdi: Allow to compile with mingw and cygwin and use recent libftdi1.
Tested with x86_64-w64-mingw32-gcc-8.2.0 and cygwin gcc (GCC) 7.3.0.
Use libftdi1 unconditionally.
Try to convice github travis to use libftdi1.
Remove unportable "uint ". Thanks to jacereda for pointing out in #400.
2019-01-07 15:31:57 +01:00
Ingmar Jager 3f0c9ccee1 Fix support for LPC1115 and LPC1115XL devices (#415)
* Add support for LPC11U3X devices.

The DeviceID register has a different address from the LPC11XX devices.
But it is shared with the LPC8XX family.

* Fix support for LPC1115 and LPC1115XL devices

* Fix whitespace
2019-01-07 13:34:00 +13:00
Josh Robson Chase 02b9d5f1ac Add delay to cortexm_reset 2019-01-07 13:32:17 +13:00
Josh Robson Chase d7e2923990 Debug on stm32f1_flash_erase errors 2019-01-07 13:32:17 +13:00
Uwe Bonnes 6df793dbf0 Revert "Allow to specificy if SRST is asserted and when it is released."
This reverts commit 44fc24e0e7.
2019-01-07 13:22:01 +13:00
Uwe Bonnes 9ce05ae67b stm32h7/f7: Store DBGMCU_CR on attach() and restore on detach().
On STM32[FH]7, DBG_SLEEP must be set for debugging.
2019-01-07 13:22:01 +13:00
Uwe Bonnes 8d6092b73f cortexm_forced_halt: Only release SRST after "Halt on reset" command.
This should make life easier if program remaps JTAG/SWD pins so that
with program running, JTAG/SWD access is impossible.
2019-01-07 13:22:01 +13:00
Uwe Bonnes 3ebf049424 cortexm: Only force halt before probe if idcode is unknown and ROM TABLE unreadable. 2019-01-07 13:22:01 +13:00
Uwe Bonnes 6633f74d95 stm32h7/f7: Write DBGMCU_CR only on attach.
Split probe/attach for STM32H7.
2019-01-07 13:22:01 +13:00
Uwe Bonnes 8575d3e7a6 stm32f7/h7: Use the DPv2 provided idcode for MCU identification. 2019-01-07 13:22:01 +13:00
Uwe Bonnes 525b90d4e5 cortexm: Only force halt before probe() if probe was forced. 2019-01-07 13:22:01 +13:00
Uwe Bonnes da75acf015 adiv5: Only force cortexm_probe() once. 2019-01-07 13:22:01 +13:00
Uwe Bonnes 489f24584b adiv5: Read TARGETID on DPv2 devices. 2019-01-07 13:22:01 +13:00
Uwe Bonnes cde7726b87 cortexm: detach still needs extra cycles. 2019-01-07 13:22:01 +13:00
Ingmar Jager 14bedcc441 Add support for LPC11U3X devices.
The DeviceID register has a different address from the LPC11XX devices.
But it is shared with the LPC8XX family.
2018-10-04 08:53:05 -07:00
Benjamin Vernoux 771d81a5f0 Fix link for windows_dfu_util 2018-10-03 15:20:09 -07:00
Uwe Bonnes d8b01ff61f swlink: Enable UART2 for SWO.
Stlink on STM8S-Disco needs additional wiring for SWO.
2018-10-03 15:19:33 -07:00
Uwe Bonnes 7cafc44bd9 swlink: Allow to enable debug on second VCOM. 2018-10-03 15:19:33 -07:00
Uwe Bonnes 0d246fb31a swlink: Measure voltage on VDD pin of Stlink/Stm8s. 2018-10-03 15:19:33 -07:00
Uwe Bonnes 184ef991bf swlink: Handle LED. 2018-10-03 15:19:33 -07:00
Uwe Bonnes 06272e0a59 swlink: Implement dfu_upgrade. 2018-10-03 15:19:33 -07:00
Uwe Bonnes 530d1e5c28 swlink: Handle force boot on bluepill. 2018-10-03 15:19:33 -07:00
Uwe Bonnes b744d8b0c9 swlink: Implement NRST. 2018-10-03 15:19:33 -07:00
Uwe Bonnes 1263d185a6 swlink: Distinguish between Stlink on STM8-Disco and "blue pill". 2018-10-03 15:19:33 -07:00
Mark Rages 91dd879dac Another nRF52 ID. 2018-09-13 16:18:29 -06:00
Gareth McMullin 3a598a0cf3
Merge pull request #384 from rikvdh/feature/readable-reset-stlink
Change the ST-Link SRST reset function
2018-09-07 08:13:48 +12:00
Uwe Bonnes f5cf6d4497 adiv5_swdp: Add extra idle cycles with write transactions.
These extra cycles are needed by some CPU, e.g. STM32L0x1 to cross the SWCLK
/HCLK domains. Revert insufficient #373 also tackling that problem.

Thanks to Thorsten von Eicken for pointing out.
2018-09-06 17:29:20 +02:00
Rik van der Heijden 95053b3b4e Change the ST-Link SRST function to use libopencm3 helper functions and fix waiting for the pin-state, change init to use the SRST function for reset de-assertion 2018-09-05 20:28:02 +02:00
Rik van der Heijden f39701c4c8 Move the LPC17xx probe function down since it performs an IAP call which can hang when performed on other devices than a LPC17xx 2018-09-05 17:40:02 +02:00
Gareth McMullin c5c0783337
Merge pull request #378 from markrages/nordic_unlock
Add extra port for mass erasing / unprotecting nRF52 with APPROTECT set.
2018-07-28 14:56:03 +12:00
Mark Rages d0a8ce0819 Add extra port for mass erasing / unprotecting nRF52 with APPROTECT set.
Mostly copied from the equivalent in kinetis.c and
https://devzone.nordicsemi.com/f/nordic-q-a/12484/approtect-and-dap/47301
2018-07-27 16:07:19 -06:00
Gareth McMullin 6fd3ede5c7
Merge pull request #377 from markrages/add_id_2
Another chip ID for Nordic nRF52832.
2018-07-28 09:53:00 +12:00
Mark Rages cb8596b0b2 Another chip ID for Nordic nRF52832. 2018-07-27 15:09:14 -06:00
Uwe Bonnes 5918608156 STM32F7: Debug does not work with WFI without DBG_SLEEP 2018-07-27 10:59:54 +02:00
Uwe Bonnes 2c1c913213 adiv5.c: Add units found on M7. 2018-07-27 10:59:54 +02:00
Uwe Bonnes f234074099 stm32h7: Start of support.
Implement probe, memory map, erase, write, uid, crc, parallelism.
2018-07-27 10:59:54 +02:00
Gareth McMullin a988bba035
Merge pull request #372 from richardeoin/efm32-1
[efm32] Add support for EFM32 devices with different DI and MSC layouts
2018-07-27 11:41:58 +12:00
Gareth McMullin d7b173ab39
Merge pull request #310 from UweBonnes/stm32l4r
arget/stm32l4.c: Add stm32l4r series and clean up.
2018-07-27 10:32:00 +12:00
Mike Walters b4dc666aca Add nRF52 QIAA C0 2018-07-26 23:13:38 +01:00
Uwe Bonnes 4a312c7697 target/stm32l4.c: Add stm32l4r series and clean up. 2018-07-22 15:44:00 +02:00
Uwe Bonnes 7034d0bb94 stm32l4: Option byte loader must be started with flash unlocked!
Warn user that device will loose connection.
2018-07-22 15:44:00 +02:00
Uwe Bonnes 83f9655f6e stm32l4: Fix wrong default for WRP2A option halfword. 2018-07-22 15:44:00 +02:00
Uwe Bonnes 139707c5c0 cortexm/detach: Add a dummy transaction after cleaning DHCSR.
This replaces the seemingly superflous swdptap_seq_out() at
the end of adiv5_swdp_low_access() needed to continue after detach.
2018-07-19 10:57:41 +02:00
Richard Meadows a7106bd346 [efm32] Add support for flashing User Data (UD) and Bootloader (BL) regions
* UD region on all devices, some devices also have BL region
* Fix page size for EZR32HG
2018-07-18 08:57:01 +00:00
Richard Meadows 55bb96cfdb [efm32] tidy compiler warning 2018-07-16 20:47:24 +00:00
Richard Meadows 98faaceb70 [efm32] Add support for EFM32 devices with different DI and MSC layouts
* DI layout is identified by attempting to read OUI from both layouts
* MSC address is passed to flashstub in r3

Retested EZR32LG230 (EZR Leopard Gecko M3)
Tested EFR32BG13P532F512GM32 (EFR Blue Gecko)

Achieves aims of PR #264 (I think) Thanks to @dholth and @ryankurte for inspiration
Fixes Issue #226
2018-07-16 20:18:36 +00:00
Antti Louko 59d6eca8f0 Fixes option erase for STM32F070x6 STM32F070xB STM32F030xC 2018-07-10 18:44:05 +03:00
Gareth McMullin c5713ea8d3
Merge pull request #366 from UweBonnes/f7_fix
stm32f4.c: F76x also has large sector by default.
2018-07-07 13:03:14 +12:00
Gareth McMullin 1b51c4961e
Merge pull request #363 from korken89/master
Removed debug bits for F4/F7 target, same as all other MCUs now
2018-07-07 13:01:05 +12:00
Uwe Bonnes 50514ccc31 stm32f4.c: F76x also has large sector by default. 2018-07-05 13:29:43 +02:00
Emil Fresk 5e8c8cae10 Removed debug bits for F4/F7 target, same as all other MCUs now 2018-06-28 16:31:34 +02:00
Uwe Bonnes 7a7266a0f7 Speed up JTAG. 2018-06-26 19:50:14 +02:00
Uwe Bonnes 59e03dea27 Keep TMS floating until scanning.
NRF5x shares nRST with SWDIO and otherwise does not run until scan is done.
2018-06-26 19:50:14 +02:00
Uwe Bonnes 97561fc5cc stlink: Decrease delay with SWD turn around for native,stlink and swlink. 2018-06-26 19:50:14 +02:00
Uwe Bonnes 5548d54626 common/swdptap: some clean up.
Remove superfluous transaction.
Use native variable size.
2018-06-26 19:50:14 +02:00
Uwe Bonnes 7e3fe352ad adiv5_swdp.c: Use swdptap_seq_out for initialiation sequence. 2018-06-26 19:50:14 +02:00
Uwe Bonnes e54a826745 common/swdptap.c: Speed up by "unrolling" swd.._seq_...() for GPIO.
Try to have sensible setup/hold times by evenntually duplicated or
logically useless port commands.
Loading code to RAM on a STM32L476 got up from 46 to 83 kB/sec.
2018-06-26 19:50:14 +02:00
Uwe Bonnes 633af5bb85 libftdi/jtagtap.c: Fix error introduced with commit de33473
Seen when scanning e.g. Zync with mon jtag 6 4.
2018-06-26 17:43:06 +02:00
Gareth McMullin b2defad844
Merge pull request #356 from UweBonnes/probe_halted
Probe halted
2018-06-21 10:06:56 -07:00
Uwe Bonnes b59bbac0b2 stm32l4: Use buffered direct write to flash. 2018-06-16 13:30:53 +02:00
Uwe Bonnes 891d6de8eb stm32f1.c: Use buffered direct write to flash with half word access. 2018-06-16 13:30:53 +02:00
Uwe Bonnes f1752c7a1a stm32f4: Allow DWORD parallelism.
Needs external VPP!
2018-06-16 13:30:53 +02:00
Uwe Bonnes 15312eb86c stm32f4: Honor parallelism also for erase. 2018-06-16 13:30:53 +02:00
Uwe Bonnes bfeb6f0db9 stm32f4: Use buffered direct flash write with choosen size. 2018-06-16 13:30:53 +02:00
Uwe Bonnes 54f73858f9 Provide a target function to write with given size. 2018-06-16 13:30:08 +02:00
Uwe Bonnes 17b817f37b cortexm: Allow to set timeout to wait for halt.
This allows to gain access to devices spending long time in WFI without
the need for a reset, at the expense of possible long waiting times.
Using Reset means loosing the device runtime context.
2018-06-13 14:03:50 +02:00
Uwe Bonnes 9e365a58f7 Cortex-M: Try harder to halt devices in WFI.
E.g. STM32F7 and L0 need multiple C_DEBUG and C_HALT commands to halt
the device.
2018-06-13 14:02:43 +02:00
Uwe Bonnes 44fc24e0e7 Allow to specificy if SRST is asserted and when it is released.
E.g. for STM32L0 and F7, IDCODE register can not be read while device is
under Reset.
2018-06-13 13:46:07 +02:00
Uwe Bonnes 66e357d517 Cortex-M: Probe Cortex-M even if ROM table read fails.
Rom table in some devices (e.g. STM32L0/F7) can not be read while
device is in WFI. The Cortex-M SWD signature is however available.
If we know by that signature, that we have a Cortex-M, force a
probe for Cortex-M devices.
2018-06-13 13:04:17 +02:00
newbrain ae6f0eadc9 Support for MSP432 TI MCUs (#353)
Introduces flashing and debugging support for Texas Instruments MSP432
series of MCUs
2018-06-07 08:34:21 +12:00
Piotr Esden-Tempski 077e455a94 Setting the driver string on scan.
This way swdp_scan and jtag_scan commands will show the chip that was
detected instead of the generic STM32F4 string. The generic name is
most confusing when attaching to an STM32F7 target.
2018-06-01 12:46:14 -07:00
Uwe Bonnes 2657aa6fbb libftdi: Allow more flexible Swd Read/Write Switching. 2018-05-30 19:21:03 +02:00
Uwe Bonnes df05d7ce7b libftdi: Allow device specific port/pin to read SWD bitbanged.
Gracefully abort swd scan if devices can not do SWD.
Best effort to indicated SWD capability on existing cables and
add descriptions for the cables.
2018-05-30 19:21:03 +02:00
Uwe Bonnes fce25b9fd5 libftdi/swdptap.c: Substantial speed increase for bitbanging SWD.
Provide the swd sequences unrolled.
2018-05-30 19:21:03 +02:00
Uwe Bonnes 992ccf91a9 libftdi/swdptap.c: Use MPSSE Mode for bitbanging SWD. 2018-05-30 19:21:03 +02:00
Uwe Bonnes f3cacba219 libftdi: Flush buffer with detach. 2018-05-30 19:21:03 +02:00
Uwe Bonnes 2ec078cfcf libftdi/jtagtap.c: Allow NULL as one DI/DO argument jtagtap_tdi_tdo_seq.
Implement jtagtap_tdi_seq() by calling jtagtap_tdi_tdo_seq().
2018-05-30 19:21:03 +02:00
Uwe Bonnes de33473535 libftdi/jtagtap: Copy DI direct into the write buffer. 2018-05-30 19:21:03 +02:00
Uwe Bonnes aa938c6dae libftdi/jtagtap: Try harder to initialize Ftdi MPSSE jtag mode.
After "mon s" at least the second "mon j" now succeeds again.
2018-05-30 19:21:03 +02:00
Uwe Bonnes c548e307fe libftdi/jtagtap: Clean up code. 2018-05-30 19:21:03 +02:00
Uwe Bonnes 7d45bd4869 ibftdi/jtagtap: Remove magic numbers. 2018-05-30 19:21:03 +02:00
Uwe Bonnes 6f0a46d9c1 libftdi: Export active cable description. 2018-05-30 19:21:03 +02:00
Uwe Bonnes 68c7180376 libftdi: Add ftdiswd variant. 2018-05-30 19:21:03 +02:00
Uwe Bonnes f4bc6f9ddd libftdi/platform.c: Issue SEND_IMMEDIATE before reading. 2018-05-30 19:21:03 +02:00
Uwe Bonnes 744deb678d libftdi/platform.c: Only set bit direction with MPSSE SET_BIT_XXXX. 2018-05-30 19:21:03 +02:00
Gareth McMullin 48d232807e
Merge pull request #337 from adamgreig/stm32f4-ram-size
Update maximum RAM sizes for F4 and F7 devices
2018-04-26 13:38:11 +12:00
Adam Greig e1cefb2031 Update maximum RAM sizes for F4 and F7 devices 2018-04-24 11:06:07 +01:00
Uwe Bonnes 93f3b14b68 stm32f1(f0): Do not read normal device registers during probe.
Device may not be halted and memory map setup may fail.
2018-04-23 11:06:08 +12:00
Uwe Bonnes a0596a0dcc stm32l4: Build Memory Map during attach.
Reading target registers while target not halted may fail and result in
invalid memory map.
2018-04-23 11:06:08 +12:00
Uwe Bonnes 5f404cdbc0 Construct memory map on the stack
The memory map uses 1k of SRAM and is only needed during attach. Release
after use lowers pressure on SRAM.
2018-04-23 10:51:04 +12:00
Uwe Bonnes 6127a6431e stlink: Check nRST line level when setting SRST.
Problem: On some boards flashing hanged.
Cause: Releasing SRST caused a slow rise of nRST and flashing
started while the target still was in reset.
Attention: platform_delay(ms) only resolved 0.1 s.
Nucleo-P boards have SRST unconnected to target nRST by default.
2018-04-23 10:48:05 +12:00
Gareth McMullin 63967346cd stm32f4: Don't duplicate resources on reattach. 2018-04-23 10:48:05 +12:00
Gareth McMullin 00decb3718 target: Separate function to free memory map. 2018-04-23 10:48:05 +12:00
Gareth McMullin 1fd2a24c2d stm32f4: Only construct memory map at attach. 2018-04-23 10:48:05 +12:00
Uwe Bonnes 72c1498ae1 stlink: Make SWO Trace Buffer smaller.
Changes for delayed memory map setup otherwise overflow SRAM silently.
2018-04-23 10:48:05 +12:00
Gareth McMullin 9d7925792f Merge branch 'master' into always_buffer_flash 2018-04-23 10:40:20 +12:00
Gareth McMullin 28bd4fc0ce
Merge pull request #305 from UweBonnes/swo_async
Use async SWO from the bluepill pull request.
2018-04-09 08:27:49 +12:00
Mike Walters fa62403ee3 nrf51: Add nRF51802 device id. (#331) 2018-04-03 10:45:56 +12:00
Uwe Bonnes fc25a3339a traceswoasync: Implement async swo for stm32.
Use for stlink.
Uses dma with large buffer.
Pull up swo to provide idle level on unconnected swo pin.
2018-03-27 13:40:49 +02:00
Uwe Bonnes 93bc3a155a traceswo: Provide command option for async swo. 2018-03-27 13:40:49 +02:00
Uwe Bonnes 3e3e450408 cdcacm.c: Use less buffer for the usb_uart buffers and reallocate.
With 128 bytes for both usb_uart buffers, traceswo gives errors!
Keep the size for the receive buffer and diminisch the transmit buffer,
as there is no flow control to the device.
Probably related to https://github.com/libopencm3/libopencm3/issues/477
2018-03-27 13:40:49 +02:00
Gareth McMullin cfaa5ea963 Merge branch 'korken89-master' 2018-03-27 13:01:06 +13:00