c161521c26
cortexm: Designer ARM must be in the default path when probing.
2020-10-23 09:40:15 +02:00
cdd07544d5
Cortexm: Allow pure debug on devices not yet handled for flashing
...
- Recognize STM32L552 and MIMXRT10XX
- Fix another PIDR
- Fix bad debug print string.
2020-10-23 09:40:15 +02:00
0ffb4f7b18
cortexm: Fix protected SAM detection
...
- Only run cortex_prepare() if reading cidr fails
- With Atmel DSU detected, run cortexm_probe()
2020-10-17 12:49:37 +02:00
5bc743d221
samd: Propagate security after setting security by chip reset.
2020-10-17 12:49:37 +02:00
8b929c12c9
hosted/jtag: Transfer jtag_devs to firmware.
2020-10-16 20:03:03 +02:00
3d92b82678
jtag: Use index and not device structure for jtag_dev_write_ir and jtag_dev_shift_dr
2020-10-16 20:03:03 +02:00
7ccf0d3e03
jtag_dev_t: Make dev, idcode and desc less generic.
...
No codechange intended.
2020-10-16 20:03:03 +02:00
87b546777a
nrf51: Be more verbose about the protection status.
2020-10-16 12:16:33 +02:00
4108b649c2
stm32h7: Add support for new product lines
...
Add support for:
* STM32H7B3/B0/A3 (RM0455)
* STM32H723/33/25/35/30 (RM0468)
Successfully tested with:
* STM32H7A3ZIT (RM0455)
* STM32H747XIH (check for regressions)
2020-10-10 22:09:34 +02:00
877b4be8ee
cortexm: Restrict probing by using the ap_designer.
...
More designers need to be observed and reported by users and added.
Request users to send needed data.
2020-10-07 20:12:35 +02:00
91d1ef8bf6
target/stm32: Use t->idcode with probe.
2020-10-07 20:12:35 +02:00
44bfb62715
Adiv5: Print Designer/Partno when device is not recognized
...
t->idcode is now 16 bit.
2020-10-07 20:12:35 +02:00
c456fc7f61
adiv5: Store AP designer and partno in the AP structure.
2020-10-07 20:12:32 +02:00
159196c2ad
Cortexm: Remove forced_halt.
2020-10-07 20:11:33 +02:00
9bb2807706
adiv5/romtable: Prepare CortexM devices to read the ROMTABLE
...
It seems, writing to DHCSR fails silent when the device is sleeping.
Reading DHCS during sleep may return nonsense.
Repeated write may at some point catch the device running and succeed.
With devices sleeping for long time and running on faster clock the
chance for a successful hotplug gets smaller.
- Try hard to halt a sleeping device
- Prepare vector catch and enable all debug units by TRACENA
- Release reset
- Apply device specific fixes
-- STM32F7: Store old value of DBGMCU_CR, enable debug in sleep in
DBGMCU before reading PIDR and restore DBGMCU on detach.
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
2020-10-07 20:11:17 +02:00
dc8924a2bc
stm32h7: Don't tc_printf from flash functions ( #747 )
...
* stm32h7: Don't tc_printf from flash functions
Receving an 'O' packet while flashing confuses GDB and then
weird stuff happens.
* Replace tc_printf with DEBUG_WARN
2020-10-05 10:45:18 +02:00
014abf6cc9
adiv5.c: Reduce number of errors if reading cidr fails.
2020-10-01 15:33:28 +02:00
be40d2b851
adiv5: Check Debug Base Address early
...
Reduces printout when scanning the romtable
2020-10-01 15:22:17 +02:00
38bc5bbf82
Add LPC546xx support #741 #553
2020-09-30 12:56:53 +02:00
2fdd94adeb
STM32F7: Add another missing Arch ID.
2020-09-24 16:20:34 +02:00
bdb351a6ea
adiv5_swdp: On ACK_FAULT, error() and try again once #731
...
when writing CSW.
2020-09-18 20:07:32 +02:00
120b3134bb
Add SAM4SD32C/B support.
2020-09-07 17:36:15 +02:00
8a2bce26f2
Hosted: Fix memory leak when platform_swdptap_init fails.
2020-09-04 11:49:13 +02:00
f65afb1588
Use correct IAP entry address for LPC84x
2020-08-14 20:00:18 +02:00
71e9d78210
adiv5.c: Add another ARCH_ID found STM32F205.
2020-08-01 14:00:17 +02:00
1b12e407fd
adiv5: Add missing arch identifiers for Cortex-M7 ETM.
2020-07-31 11:53:15 +02:00
696daa8352
adiv5: fix debug print of dev_type
...
Since dev_type is an 8 bit unsigned integer, use the PRIx8 macro instead
of PRIx32.
2020-07-29 11:32:24 +02:00
726d4b4496
adiv5.c: Add missing DEVTYPE and ARCHID to some existing PIDRs(#698,#699)
...
Probably more additions are needed.
2020-07-14 16:26:32 +02:00
09ceaea70f
adiv5_swdp: Fix another memory leak.
2020-07-14 15:02:13 +02:00
7ebb94d134
cortexm: Add comment on CPUID register
2020-07-12 22:54:39 +02:00
4391851f4d
adiv5: Change component descriptions from MTB to Micro Trace Buffer for consistency
2020-07-12 22:29:04 +02:00
0aadd0abce
Adiv6: Add comment on DEVTYPE and ARCHID fields with references
2020-07-12 22:27:46 +02:00
fcd945a529
cortexm: Read CPUID to identify core version
2020-07-12 12:08:22 +02:00
39a20d78ff
v8m: only check relevant bits in DHCSR when polling in cortexm_forced_halt
2020-07-12 12:07:12 +02:00
a35e9c8e5c
Adiv6: Read DEVTYPE and ARCHID to identify Cortex-M23 and Cortex-M33 debug components
2020-07-12 12:00:31 +02:00
661f78033a
stm32f1: Add F1 XL with dual bank handling,
2020-07-08 14:31:58 +02:00
eabd69dcdb
Adiv5: Protect DBG/SYSTEM Power-Up request with timeout too.
...
CMSIS-DAP without connected target looped infinite in that situation.
2020-06-07 13:14:32 +02:00
dc3fd2eb06
Classify debug messages
...
Firmware BMP with ENABLE_DEBUG=1 will print WARN and INFO as before.
PC-Hosted BMPwill alway print to stderr. Warn is printed unconditional,
INFO, GDB, TARGET, DONGLE and WIRE will print if their appropriate bit in
cl_debuglevel is set via the -v verbose command line argument.
INFO will go to stdout with -t or -l.
2020-06-05 14:59:30 +02:00
64f3dff8a8
PC-Hosted: Better debug output.
2020-06-05 14:59:30 +02:00
b06c0ba8d5
bmp_remote: Use high level functions.
...
Based on #570 (OpenOCD HLA interface driver for Blackmagic), but now
usefull for bmp-remote.
2020-06-05 14:59:30 +02:00
c3d509e6c0
Clean up PLATFORM_HAS_DEBUG
...
Use only for firmware platforms.
2020-06-05 14:59:30 +02:00
563df2d354
Detour ADIv5 high-level functions.
2020-06-05 14:59:30 +02:00
9969c984f3
detour jtag primitives.
2020-06-05 14:59:30 +02:00
e34a27f72c
Detour swd primitives.
2020-06-05 14:59:30 +02:00
b0cf7d24bd
adiv5.c: Fix another leak.
2020-06-05 14:59:30 +02:00
783ec377d9
adiv5: Export extract.
2020-06-05 14:59:30 +02:00
966ac4036d
target.c: Check for valid flash structure.
2020-06-05 14:59:30 +02:00
60f39f55b4
MSP432: Warn when hardware version not supported.
2020-06-05 14:59:30 +02:00
05adcd9bf5
remote.c: Compile only relevant functions.
...
Do no compile firmware functions when compiling pc-hosted.
2020-06-05 14:59:30 +02:00
16967b4328
adiv5: Remove only local dp_idcode used from ADIv5_DP_t struct.
2020-06-05 14:59:30 +02:00
b8b34e7b1d
adiv5: remove cfg for AP structure, cfg is only used local.
2020-06-05 14:59:30 +02:00
69e330849d
fix flash map for STM32G431, as it is a special case different from the STM32G47x and STM32G48x chips
2020-06-05 13:41:18 +02:00
f9f928e9d6
Add support for LPC8N04
2020-06-05 12:33:51 +02:00
6eb1b09c1c
pc-hosted semihosting
2020-05-27 12:51:29 +02:00
54ee00b0f6
set semihosting sys_clock time origin
2020-05-13 17:50:39 +02:00
499309f648
stm32f1: Tell user about STM32F10(3) clone.
2020-05-13 13:07:55 +02:00
1a83bc6892
Rename variant_string in efm32 samd samx5x ( #659 )
...
* Rename variant_string
Files efm32 samd samx5x uses same function name that collides during
linking (checked with gcc10)
Signed-off-by: Alexey 'Alexxy' Shvetsov <alexxyum@gmail.com>
* Also make xxx_variant_string static
Signed-off-by: Alexey 'Alexxy' Shvetsov <alexxyum@gmail.com>
2020-05-12 17:47:04 +02:00
9b939f4a3a
stm32f4: Fix option byte handling ( #654 )
...
Option bytes are not accessible with level 1 protection, so
Use FLASH_OPTCR(x)
Fix crash with "mon opt write xxxx"
Handle option manipulation better when HW Watchdog fuse is set
Allow abbreviated "mon option x<yyy>" commands
2020-05-05 12:52:32 +02:00
923949d5dd
Fixed variable/function name clash building on Windows
2020-05-03 15:45:31 +02:00
9f8c7be360
semihosting
2020-05-02 12:55:29 +02:00
8851504a41
new semihosting commands
2020-04-23 09:43:46 +02:00
ada17ada23
stm32f4/7: Always use largest flashsize for device family ( #633 , #635 , #644 )
...
Do not care for the FLASHSIZE register. Leave it up to the user to abuse
flash area the ST did not announce.
2020-04-21 17:04:07 +02:00
164eb43f00
NRF5: Do not reset target options.
2020-04-14 19:01:43 +02:00
bea8436561
NRF5: Always set CORTEXM_TOPT_INHIBIT_SRST( #230 )
...
The problem also happens with NRF52840. Set CORTEXM_TOPT_INHIBIT_SRST
for all NRF5 device.
People should be more persistent!
2020-04-14 18:11:23 +02:00
d1468530bd
add basic support for LPC11U68 (and maybe LPC11U68)
2020-04-06 23:36:49 +02:00
846dadcc39
lmi: add support for TM4C1294NCPDT
2020-04-03 19:42:24 +02:00
c4d7232223
Export function to read out PIDR and use for samd and samx5x.
2020-03-26 19:05:57 +01:00
a0e42e229b
Make more things static.
...
No functional change intendend.
2020-03-26 18:44:19 +01:00
effd43ce38
Harden cortexm_reset() and remove double reset( #601 )
...
Thanks to Dave Marples <dave@marples.net> for input.
- Issue only one reset. Start with SRST. Only if not seen, use SYSRESETREQ
- Wait for release of DHCSR_S_RESET_ST before issuing more commands
- Add timeout to catch reset line stuck low
- Remove AP errors
2020-03-25 11:22:14 +01:00
2e185ba578
BMP/PC: Allow to compile with mingw64 ( #615 )
...
__USE_MINGW_ANSI_STDIO 1 must be set befor any windows specific included.
2020-03-24 17:59:13 +01:00
a7efe7cc14
cl-utils: Display targets found.
...
+ other small changes in DEBUG output.
2020-03-10 17:34:30 +01:00
2065c70888
adiv5: Split PRIx64 into two PRIx32 as nanolib does not support PRIx64.
2020-03-10 10:56:42 +01:00
75186f7d50
ADIv5: More CoreSight device decoding:
...
- MTB-M0+ (Simple Execution Trace)
- M33: Devices need finer decoding (DEVTYPE at offset 0xfcc)
2020-03-08 22:37:59 +01:00
919d9320fd
Remove unrelated files.
2020-03-06 19:33:20 +01:00
288620551f
adiv5: Print out SYSROM PIDR.
...
We need to know more about what devices indicate proper PIDR and what
devices fail to do so.
2020-03-04 19:02:07 +01:00
8c959defca
efm32: Make local functions static.
2020-03-04 18:44:40 +01:00
470c8e8cf1
target_flash_erase: Do not crash when requesting erase of unavailable flash.
...
Allow to erase from command line.
2019-12-13 14:59:42 +01:00
ab396f9745
Allow %z specifier in windows builds. Supercedes #562 .
2019-12-08 16:43:19 +01:00
1bef51e145
adiv5: Abort scanning APs after 8 void APs.
2019-12-08 16:43:19 +01:00
bdd76de517
Erase: Fix endless erase when erase-area did not end on (page|block) boarder.
2019-12-08 16:43:19 +01:00
25d24e5c34
efm32: Allow to compile with -Og.
2019-12-08 16:43:19 +01:00
5943552a6b
[efm32] Probe for the EFM32 Authentication Access Port (AAP)
...
Supported functionality through this AP:
* Issuing a DEVICEERASE command
2019-12-08 16:21:02 +01:00
260fc88d8f
[efm32] Add command to set and print bootloader enable status
...
This is a bit in the Lock Bit (LB) flash page, so it can only be
cleared by this routine
2019-12-08 16:17:02 +01:00
7f0d5febc3
[efm32] Print MSC Interrupt Flags to DEBUG after each flash write
2019-12-08 16:16:55 +01:00
e85df763b7
[efm32] add new devices PG12B, JG12B, GG11B, TG11B, GG12B
...
Rework MSC layout check
2019-12-08 15:55:12 +01:00
f89542c79f
Merge pull request #203 from dlaw/master
...
Add LPC11xx command to read out unique ID from target. Restore Ram and registers after call.
2019-12-08 15:45:49 +01:00
8a07f44435
Add support for the kinetis KL16Zxx devices. Tested on KL16Z128VFM4 custom hardware
2019-11-21 20:37:13 +01:00
e7e34600a4
lpc11: Only print Idcode if not zero and not yet handled.
...
Otherwise for all Cortex-M not yet handled this LPC messages appears.
2019-11-17 13:24:39 +01:00
9198c951bb
Reduce flash space required for SAM D51/E5x driver
...
* Reuse functions that are common with the SAM D1x/D2x driver
* Only include the mbist and write8/16/32 user commands if
SAMX5X_EXTRA_CMDS is defined
2019-11-17 12:45:49 +01:00
d3c330ea1a
Fix issues with Travis CI build
...
It appears the Travis version of gcc-arm-none-eabi doesn't allow the %x
printf format specifier for size_t arguments, in contrast with the
version I'm running on Ubuntu 18.04 (15:6.3.1+svn253039-1build1).
2019-11-17 12:45:49 +01:00
26216beaab
Microchip SAM D51 / E5x support
...
Adds a target driver for Microchip SAM D51 / E5x family.
Tested on SAMD51G19A and SAMD51J19A. According to the datasheet, the
D51 / E5x family share the same core feature set, differing only in the
addition of CAN (E51) or ethernet controllers (E53/54). All members of
the family should be equivalent from a debug and programming perspective.
2019-11-17 12:45:49 +01:00
28f0ced97e
Support NXP LPC1343
2019-11-09 18:47:07 +01:00
67f9d26644
samd: Add support for L21 & L22 (PR #345 )
2019-11-09 13:59:37 +01:00
b9249fe104
adiv5: Activate DP reset sequence, guarded with timeouts.
...
While not working on most STM32, it succeeds on STM32G474.
Thanks to Dave Marples <dave@marples.net>
2019-10-20 22:15:28 +02:00
4a8cba0e9c
Add support for LPC1114/333 (LPC1100XL series)
...
This is not given in the user manual but the register immediately
following DEVICE_ID does apparently contain the correct part ID.
2019-10-13 13:01:19 +02:00
5c805c7d35
Fix buffer overflow in adiv5_component_probe()
2019-10-12 11:44:08 +02:00
0ae7cea1ae
Add LPC84 from UM11029, Rev. 1.4, tested on LPC845 Breakout board.
2019-10-08 18:17:43 +02:00
1cf0b8ac13
Make all arguments for all commands (struct *t, int argc, const char **argv).
...
-Wall on gcc8 otherwise warns without -Wno-cast-function-type but older
GCCs/CLang choke on that argument:
error: unknown warning option '-Wno-cast-function-type'; did you mean
'-Wno-bad-function-cast'? [-Werror,-Wunknown-warning-option]
This adds 24 byte to the binary, as some functions are now called with
additional dummy arguments:
"Pushing and popping garbage to keep the system happy"
2019-09-29 12:44:55 +02:00
f010a567bd
adiv5: Reject APs duplicating last AP.
...
Seen with TM4C129 on black MSP432R401 Launchpad. Scanning of APs is aborted,
so valid APs after duplicated APs are ignored.
2019-09-29 12:44:37 +02:00
fae2966b72
Target: Default to nop-function() for all exported target functions.
...
Fixes #522 .
2019-09-23 17:42:29 +02:00
609e6b135d
nrf51: Add nop_function as halt_poll. ( #517 )
...
Otherwise "tar ext ...; mon s; att 2; quit", start new gdb "tar ext ..."
crashes, at least on pc-hosted platforms.
2019-09-04 13:50:13 +02:00
6663da7ff5
cortexm.c: Fix DWT Mask ( #516 )
...
See #513
2019-09-04 13:28:55 +02:00
00937348b3
Fixes to compile "make ENABLE_DEBUG=1 all_platforms" ( #515 )
2019-09-04 13:09:43 +02:00
e6504e149b
cortexm: Implement single register read/write
2019-09-01 20:38:38 +02:00
7bcf7f4924
cortexa: Implement single register read/write
2019-09-01 20:38:38 +02:00
20cad17ce3
target: Implement generic multi-register read/write
2019-09-01 20:38:38 +02:00
9f4cf4124e
target: Add new methods for read/write individual regs.
2019-09-01 20:38:38 +02:00
d39dc34382
pc-stlinkv2: Fix reg_read|write
...
- Fix wrong placed brace in cortexm_regs_write()
- Start writing with r0
- With register read, save only registers listed
2019-09-01 12:11:37 +02:00
aef055bb6f
adiv5: If setup AP0 fails, fail immediate.
2019-08-31 11:20:17 +02:00
6bf4fd3598
pc-stlinkv2: CPU register read and write must be done with the AP set.
...
FIXME: Writing CPU registers on M4 of STM32H745 seems not to work.
2019-08-27 15:13:15 +02:00
4289788e0b
src: Replace sprintf with snprintf
...
snprintf is needed anyway, that's one less function to have :p
And it's bad practice anyway.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2019-08-05 15:43:33 +02:00
1d4152a36f
target: Make sure variant_string is consistent in size
...
It's a global symbol and LTO will complain if the one in this file and
the one in EFM32 target are inconsistent.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2019-08-05 15:42:29 +02:00
e29f2b4fb9
jtag/swd: Rename defines/make variables to allow removal of weak attribute
...
jtagtap.c is libopencm3 generic. Move to common.
2019-07-18 20:54:10 +02:00
067956266c
Adiv5: Remove weak attribute to ease windows compile.
2019-07-18 18:16:19 +02:00
9e898cc4b8
adiv5: Add more coresight part numbers found on STM32MP157c-DK2 ( #492 ).
...
Only print corename if not NULL.
2019-07-18 17:39:48 +02:00
dd3cb193f3
Indicate the Core in the Target list.
2019-07-17 17:38:21 +02:00
c44cb904b0
adiv5.c: Format debug output more tense.
2019-07-17 17:38:21 +02:00
634c07c432
adiv5: Add TSGEN.
2019-07-17 17:38:21 +02:00
9ed26645d3
Add pc_stlinkv2 platform, running on host, talking to original StlinkV2/3.
...
Stlink firmware needs to be recent.
2019-07-17 17:38:01 +02:00
32d2b2c4bf
jtag: Move device list to it's own file to allow reuse.
2019-07-17 17:26:00 +02:00
bd530c8951
adiv5.c: Make functions weak where high level platforms may implement different.
2019-07-17 17:26:00 +02:00
b4c680bb15
Add STM32G4
...
Based on #488 Stephen Roe, done as #491 .
Fixes ID of STM32G03.
2019-07-17 17:24:23 +02:00
5a7ffe7a40
Fixed SAM3X8C large file flashing.
...
The datasheet specifies the EEFC_BASE(0) is at `0x400E0A00` and EEFC_BASE(1) is at `0x400E0C00` which means they're spaced 0x200 bytes apart rather than 0x400.
2019-07-17 14:37:07 +02:00
02b2fdb2ae
fix overwriting of still-needed value (refs #487 )
...
this fixes a bug that was introduced in blackmagic PR #475 which lead to
firmware crashes when connecting to a BMP more than once without a
power-cycle.
2019-06-24 16:45:18 +02:00
589d297d20
stm32l0: Fix crash when only "monitor option" was requested.
...
PR #485
2019-06-12 12:54:29 +02:00
880613d641
lpc_common: restore RAM and registers after IAP call
...
Restore the RAM and registers which are clobbered by an LPC IAP call.
This does not restore any additional RAM which might be clobbered
by a *particular* IAP call. (For example, flash programming always
clobbers the last page of RAM.)
2019-05-30 14:01:27 -04:00
d3979a57b6
Add LPC command to read out unique ID from target.
...
This commit modifies lpc_iap_call() to work with IAP commands that
return additional data. If the "result" argument is non-null, 16
bytes of data (the maximum returned by any IAP command) are copied
to the specified address.
2019-05-30 14:01:12 -04:00
600bc9f029
Generate DEBUG warnings and return if `malloc`/`calloc` fail.
...
This is will make debugging earier if this does happen, rather than
dereferencing the null pointer (or passing it to memcpy, or worse).
blackmagic PR #475
2019-05-26 18:56:12 +02:00
61e9607594
[adiv5] Improvements in ADIv5
...
* Reference latest version of the ARM specification
* ROM tables - more debug information, including printing SYSMEM bit
* MEM-AP - reject when Debug Base Address entry is not
present/invalid. These would only have errored in
adiv5_component_probe.
* Fix maximum number of entries in Class 0x1 ROM Table to 960. See ARM
IHI 0031E Table D3-1 ROM Table register summary.
* Resolve note in STM32H7 driver with explaination
blackmagic PR #474
2019-05-24 22:00:44 +02:00
24a7b8b2bf
[stm32h7] add revision command which reads the `DBGMCU_IDC` register
...
blackmagic PR #476
2019-05-21 23:20:13 +02:00
c336c300a3
[stm32h7,bugfix] Fix bug: target_add_flash called in attach
...
When `target_add_flash` or `target_add_ram` are called in an attach
function they may be added multiple times. This very much confuses
GDB. This issue has already been reported and fixed for `stm32l4` (See
Issue #455 ).
`stm32f4` and `stm32l4` are the only other cortexm drivers that
implement this pattern. These are both fine.
2019-05-21 22:38:16 +02:00
984813a29d
Add Stm32G03 from reference manual Rev.2
...
Not yet tested on a real part.
2019-04-24 12:29:58 +02:00
302ff20a6d
Merge pull request #434 from UweBonnes/nrf5
...
Nrf5
2019-03-21 19:43:29 +01:00
3235fa2005
Improve parsing of commands that require enable or disable arguments:
...
* Accept prefixes of the words 'enable' and 'disable'
* Prevent silent failures on parse errors
* Print status after flag changes
* Fix missing includes
2019-03-19 12:56:44 -07:00
691ada17e9
Implement read device info for NRF5x
2019-03-10 21:45:47 +01:00
3f89fed32e
nrf51: Use buffered direct write to flash.
2019-03-10 21:45:47 +01:00
4ecd13a9a3
nrf51: Fix crash with not argument given to "mon read".
2019-03-10 21:45:47 +01:00
db2f403417
sam4l: Remove noisy debug message.
2019-03-10 21:45:47 +01:00
a336ac2084
NRF5: New detection scheme.
2019-03-10 21:45:47 +01:00
6887628eaa
Correction of #445 attach-detach problem
...
Memory map is now completely freed and rebuilt in the separate attach
function.
It was previoulsy split beween probe and attach and never released,
causing problems when reattaching to the same target.
2019-03-03 15:55:40 +01:00
da62cbaa3d
Merge pull request #449 from jelson/width-fix
...
Use 32-bit variable for 32-bit read
2019-02-25 13:21:55 +01:00
86ed86c2a2
Use 32-bit variable for 32-bit read. (Also fixes DEBUG compile
...
error due to mismatch of format and argument.)
2019-02-24 17:49:30 -08:00
56fb0f7766
Handle STM32F730 and STM32H750.
...
Flash sector calculation was wrong with small flash sizes.
2019-02-21 19:19:10 +01:00
3f8c40d3f5
Fixing stm32l4 target to allow probing w/o halting
2019-02-21 18:06:38 +01:00
8de1b45c85
Kinetis KE04: Flash and debug support
...
Support for Kinetis KE04 8KiB, 64KiB and 128KiB variants in nxpke04.c
Target monitor commands for sector and mass erase.
Changes to kinetis.c MDM-AP target to support KE04.
Only KE04Z8 tested in HW.
2019-02-17 22:48:23 +01:00
02c1934c03
Added ability to lock and unlock boot rom for samd controllers
2019-02-13 16:33:07 -08:00
0b28232f72
[efm32] Assume Device Identification (DI) version 1 if we don't know the OUI ( #402 )
...
* [efm32] Assume Device Identification (DI) version 1 if we don't know the OUI
Silabs are using some additional OUIs we don't know about. Reported in issue #389
These should use a DI version 1 layout, so assume version 1 layout for OUIs we don't
know. However do print a notice about this on DEBUG() as suggested by @UweBonnes
The IDCODE value is sufficient to make a positive identification of an EFM32 device.
See AN0062 Section 2.2. Therefore accepting any OUI is reasonable behaviour.
Additionally the part familiy is checked, and the target rejected if not in the
`efm32_devices` table. This commit makes that rejection explicit, although it does
not change the logical behaviour here.
Note that the important registers (part number, part family, flash size) are at the
same addresses in both layouts anyhow. Currently only `efm32_cmd_serial` and
`efm32_cmd_efm_info` functions use registers that differ between DI versions.
* [efm32] tidy format warning about portability UB
* [efm32] Simplify OUI checking
* Only read the OUI once
* Accept the device even if the OU is unknown, as silabs have been using
a variety of OUIs
* Perform fewer register reads before checking the device family is valid
2019-01-16 09:58:59 +13:00
7cc02867ae
stm32f4: Fix problems with small flash sizes creating overflow or empty regions.
...
Thanks to "DerMeisteRR" for pointing out.
2019-01-09 12:23:49 +01:00
47fad2bf7f
Add Stm32L41x.
2019-01-09 12:23:49 +01:00
f0c6e2bbd2
Add STM32G07x.
2019-01-09 12:23:49 +01:00
0793dac2cf
libftdi: Allow to compile with mingw and cygwin and use recent libftdi1.
...
Tested with x86_64-w64-mingw32-gcc-8.2.0 and cygwin gcc (GCC) 7.3.0.
Use libftdi1 unconditionally.
Try to convice github travis to use libftdi1.
Remove unportable "uint ". Thanks to jacereda for pointing out in #400 .
2019-01-07 15:31:57 +01:00
3f0c9ccee1
Fix support for LPC1115 and LPC1115XL devices ( #415 )
...
* Add support for LPC11U3X devices.
The DeviceID register has a different address from the LPC11XX devices.
But it is shared with the LPC8XX family.
* Fix support for LPC1115 and LPC1115XL devices
* Fix whitespace
2019-01-07 13:34:00 +13:00
02b9d5f1ac
Add delay to cortexm_reset
2019-01-07 13:32:17 +13:00
d7e2923990
Debug on stm32f1_flash_erase errors
2019-01-07 13:32:17 +13:00
9ce05ae67b
stm32h7/f7: Store DBGMCU_CR on attach() and restore on detach().
...
On STM32[FH]7, DBG_SLEEP must be set for debugging.
2019-01-07 13:22:01 +13:00
8d6092b73f
cortexm_forced_halt: Only release SRST after "Halt on reset" command.
...
This should make life easier if program remaps JTAG/SWD pins so that
with program running, JTAG/SWD access is impossible.
2019-01-07 13:22:01 +13:00
3ebf049424
cortexm: Only force halt before probe if idcode is unknown and ROM TABLE unreadable.
2019-01-07 13:22:01 +13:00
6633f74d95
stm32h7/f7: Write DBGMCU_CR only on attach.
...
Split probe/attach for STM32H7.
2019-01-07 13:22:01 +13:00
8575d3e7a6
stm32f7/h7: Use the DPv2 provided idcode for MCU identification.
2019-01-07 13:22:01 +13:00
525b90d4e5
cortexm: Only force halt before probe() if probe was forced.
2019-01-07 13:22:01 +13:00
da75acf015
adiv5: Only force cortexm_probe() once.
2019-01-07 13:22:01 +13:00
489f24584b
adiv5: Read TARGETID on DPv2 devices.
2019-01-07 13:22:01 +13:00
cde7726b87
cortexm: detach still needs extra cycles.
2019-01-07 13:22:01 +13:00
14bedcc441
Add support for LPC11U3X devices.
...
The DeviceID register has a different address from the LPC11XX devices.
But it is shared with the LPC8XX family.
2018-10-04 08:53:05 -07:00
91dd879dac
Another nRF52 ID.
2018-09-13 16:18:29 -06:00
f5cf6d4497
adiv5_swdp: Add extra idle cycles with write transactions.
...
These extra cycles are needed by some CPU, e.g. STM32L0x1 to cross the SWCLK
/HCLK domains. Revert insufficient #373 also tackling that problem.
Thanks to Thorsten von Eicken for pointing out.
2018-09-06 17:29:20 +02:00
f39701c4c8
Move the LPC17xx probe function down since it performs an IAP call which can hang when performed on other devices than a LPC17xx
2018-09-05 17:40:02 +02:00
c5c0783337
Merge pull request #378 from markrages/nordic_unlock
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Add extra port for mass erasing / unprotecting nRF52 with APPROTECT set.
2018-07-28 14:56:03 +12:00
d0a8ce0819
Add extra port for mass erasing / unprotecting nRF52 with APPROTECT set.
...
Mostly copied from the equivalent in kinetis.c and
https://devzone.nordicsemi.com/f/nordic-q-a/12484/approtect-and-dap/47301
2018-07-27 16:07:19 -06:00
6fd3ede5c7
Merge pull request #377 from markrages/add_id_2
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Another chip ID for Nordic nRF52832.
2018-07-28 09:53:00 +12:00
cb8596b0b2
Another chip ID for Nordic nRF52832.
2018-07-27 15:09:14 -06:00
5918608156
STM32F7: Debug does not work with WFI without DBG_SLEEP
2018-07-27 10:59:54 +02:00
2c1c913213
adiv5.c: Add units found on M7.
2018-07-27 10:59:54 +02:00
f234074099
stm32h7: Start of support.
...
Implement probe, memory map, erase, write, uid, crc, parallelism.
2018-07-27 10:59:54 +02:00
a988bba035
Merge pull request #372 from richardeoin/efm32-1
...
[efm32] Add support for EFM32 devices with different DI and MSC layouts
2018-07-27 11:41:58 +12:00
d7b173ab39
Merge pull request #310 from UweBonnes/stm32l4r
...
arget/stm32l4.c: Add stm32l4r series and clean up.
2018-07-27 10:32:00 +12:00
b4dc666aca
Add nRF52 QIAA C0
2018-07-26 23:13:38 +01:00
4a312c7697
target/stm32l4.c: Add stm32l4r series and clean up.
2018-07-22 15:44:00 +02:00
7034d0bb94
stm32l4: Option byte loader must be started with flash unlocked!
...
Warn user that device will loose connection.
2018-07-22 15:44:00 +02:00
83f9655f6e
stm32l4: Fix wrong default for WRP2A option halfword.
2018-07-22 15:44:00 +02:00
139707c5c0
cortexm/detach: Add a dummy transaction after cleaning DHCSR.
...
This replaces the seemingly superflous swdptap_seq_out() at
the end of adiv5_swdp_low_access() needed to continue after detach.
2018-07-19 10:57:41 +02:00
a7106bd346
[efm32] Add support for flashing User Data (UD) and Bootloader (BL) regions
...
* UD region on all devices, some devices also have BL region
* Fix page size for EZR32HG
2018-07-18 08:57:01 +00:00
55bb96cfdb
[efm32] tidy compiler warning
2018-07-16 20:47:24 +00:00
98faaceb70
[efm32] Add support for EFM32 devices with different DI and MSC layouts
...
* DI layout is identified by attempting to read OUI from both layouts
* MSC address is passed to flashstub in r3
Retested EZR32LG230 (EZR Leopard Gecko M3)
Tested EFR32BG13P532F512GM32 (EFR Blue Gecko)
Achieves aims of PR #264 (I think) Thanks to @dholth and @ryankurte for inspiration
Fixes Issue #226
2018-07-16 20:18:36 +00:00
59d6eca8f0
Fixes option erase for STM32F070x6 STM32F070xB STM32F030xC
2018-07-10 18:44:05 +03:00
c5713ea8d3
Merge pull request #366 from UweBonnes/f7_fix
...
stm32f4.c: F76x also has large sector by default.
2018-07-07 13:03:14 +12:00
1b51c4961e
Merge pull request #363 from korken89/master
...
Removed debug bits for F4/F7 target, same as all other MCUs now
2018-07-07 13:01:05 +12:00
50514ccc31
stm32f4.c: F76x also has large sector by default.
2018-07-05 13:29:43 +02:00
5e8c8cae10
Removed debug bits for F4/F7 target, same as all other MCUs now
2018-06-28 16:31:34 +02:00
5548d54626
common/swdptap: some clean up.
...
Remove superfluous transaction.
Use native variable size.
2018-06-26 19:50:14 +02:00
7e3fe352ad
adiv5_swdp.c: Use swdptap_seq_out for initialiation sequence.
2018-06-26 19:50:14 +02:00
b2defad844
Merge pull request #356 from UweBonnes/probe_halted
...
Probe halted
2018-06-21 10:06:56 -07:00
b59bbac0b2
stm32l4: Use buffered direct write to flash.
2018-06-16 13:30:53 +02:00
891d6de8eb
stm32f1.c: Use buffered direct write to flash with half word access.
2018-06-16 13:30:53 +02:00
f1752c7a1a
stm32f4: Allow DWORD parallelism.
...
Needs external VPP!
2018-06-16 13:30:53 +02:00
15312eb86c
stm32f4: Honor parallelism also for erase.
2018-06-16 13:30:53 +02:00
bfeb6f0db9
stm32f4: Use buffered direct flash write with choosen size.
2018-06-16 13:30:53 +02:00
54f73858f9
Provide a target function to write with given size.
2018-06-16 13:30:08 +02:00
17b817f37b
cortexm: Allow to set timeout to wait for halt.
...
This allows to gain access to devices spending long time in WFI without
the need for a reset, at the expense of possible long waiting times.
Using Reset means loosing the device runtime context.
2018-06-13 14:03:50 +02:00
9e365a58f7
Cortex-M: Try harder to halt devices in WFI.
...
E.g. STM32F7 and L0 need multiple C_DEBUG and C_HALT commands to halt
the device.
2018-06-13 14:02:43 +02:00
66e357d517
Cortex-M: Probe Cortex-M even if ROM table read fails.
...
Rom table in some devices (e.g. STM32L0/F7) can not be read while
device is in WFI. The Cortex-M SWD signature is however available.
If we know by that signature, that we have a Cortex-M, force a
probe for Cortex-M devices.
2018-06-13 13:04:17 +02:00
ae6f0eadc9
Support for MSP432 TI MCUs ( #353 )
...
Introduces flashing and debugging support for Texas Instruments MSP432
series of MCUs
2018-06-07 08:34:21 +12:00
077e455a94
Setting the driver string on scan.
...
This way swdp_scan and jtag_scan commands will show the chip that was
detected instead of the generic STM32F4 string. The generic name is
most confusing when attaching to an STM32F7 target.
2018-06-01 12:46:14 -07:00
df05d7ce7b
libftdi: Allow device specific port/pin to read SWD bitbanged.
...
Gracefully abort swd scan if devices can not do SWD.
Best effort to indicated SWD capability on existing cables and
add descriptions for the cables.
2018-05-30 19:21:03 +02:00
f3cacba219
libftdi: Flush buffer with detach.
2018-05-30 19:21:03 +02:00
48d232807e
Merge pull request #337 from adamgreig/stm32f4-ram-size
...
Update maximum RAM sizes for F4 and F7 devices
2018-04-26 13:38:11 +12:00
e1cefb2031
Update maximum RAM sizes for F4 and F7 devices
2018-04-24 11:06:07 +01:00
93f3b14b68
stm32f1(f0): Do not read normal device registers during probe.
...
Device may not be halted and memory map setup may fail.
2018-04-23 11:06:08 +12:00
a0596a0dcc
stm32l4: Build Memory Map during attach.
...
Reading target registers while target not halted may fail and result in
invalid memory map.
2018-04-23 11:06:08 +12:00
5f404cdbc0
Construct memory map on the stack
...
The memory map uses 1k of SRAM and is only needed during attach. Release
after use lowers pressure on SRAM.
2018-04-23 10:51:04 +12:00
63967346cd
stm32f4: Don't duplicate resources on reattach.
2018-04-23 10:48:05 +12:00
00decb3718
target: Separate function to free memory map.
2018-04-23 10:48:05 +12:00
1fd2a24c2d
stm32f4: Only construct memory map at attach.
2018-04-23 10:48:05 +12:00
9d7925792f
Merge branch 'master' into always_buffer_flash
2018-04-23 10:40:20 +12:00
fa62403ee3
nrf51: Add nRF51802 device id. ( #331 )
2018-04-03 10:45:56 +12:00
cfaa5ea963
Merge branch 'korken89-master'
2018-03-27 13:01:06 +13:00
76bfb4929d
Use lowercase register names.
2018-03-27 13:00:39 +13:00
a3f855ce5c
Merge branch 'master' of https://github.com/konsgn/blackmagic into konsgn-master
2018-03-27 08:03:03 +13:00
31965a5bbc
Added support for k64 ( #301 )
2018-03-25 14:43:33 -07:00
471ce2547c
Added LPC17xx support ( #317 )
2018-03-25 12:53:30 -07:00
a41d8cb97a
Another nRF52 device id. ( #315 )
2018-03-25 12:37:51 -07:00
1ee6d4503e
Update to split 'special' into its sane parts (update from @mubes)
2018-03-24 16:44:59 +01:00
04fbabb299
mkl27 support
2018-01-21 23:43:01 -05:00
1fe870b8df
added MKL27<128kB support
2018-01-16 13:23:36 -05:00
922f857de7
stm32f1.c: Add missing fall through statement needed by GCC7.
2017-12-18 13:56:59 +01:00
1f3c235205
src/target/stm32f1.c: Add CCM Ram of STM32F303 devices.
2017-12-08 13:39:24 +01:00
048e8447a5
target: Only support buffered flash writes
2017-10-13 08:58:37 +13:00
c53a12bfd1
cortexm: Better cache support for Cortex-M7
...
- On probe, read CTR for cache presence and minimum line length
- Make D-Cache clean a function
- Clean before memory reads
- Clean and invalidate before memory writes
- Flush all I-Cache before resume
2017-10-12 09:26:01 +13:00
0e5b3ab00e
Make Cortex M driver write DCCIMVAC (Data cache clean and invalidate by address to the PoC=Point of Coherency) prior to reading or writing each 32 bytes of RAM
2017-10-12 08:41:58 +13:00
120a2d9378
target: Fix calculation of erase size.
2017-10-05 22:11:01 +02:00
a7815fff3d
target.c: No need to split write while still in same flash block.
2017-10-04 21:52:29 +02:00
25610e5ec5
target: Fix unconsistant use of tmplen.
2017-10-04 21:52:29 +02:00
0aa47113f3
stm32f4: Fix F4 dual bank OPTCR1 to option byte mapping.
2017-10-02 16:22:14 +02:00
c4d3712b39
stm32f4.c: Rework flash structure recognition.
...
Dual bank devices do not have sectors (8)12..15 !
Dual banks devices need to MER1 set for mass erase.
F72x has different FLASHSIZE_BASE
2017-10-02 16:22:14 +02:00
259f1b90df
cortexa: Check for fault on set/clear soft breakpoint.
2017-09-20 11:16:36 +12:00
1cb4271749
cortexa: Remove problematic code for AHB access.
...
The old code for 'fast' memory accesses using the AHB directly
has problems with data consitency. Until this can be resolved, I'm
removing the affected code.
2017-09-19 09:13:22 +12:00
2df0c7d6a7
Merge pull request #261 from cpavlina/tm4c
...
lm3s/tm4c: add TM4C1230C3PM
2017-09-06 15:34:42 +12:00
46e363393f
Add nRF52840 support (PCA10056, nrf52840 PDK)
2017-09-03 23:05:29 +00:00
37f9623de2
Added NRF51_FICR_CONFIGID for nRF51822 QFAA H2
2017-08-30 17:14:52 +02:00
37bb86267a
STM32F0: Several STM32F0[3|7]0 have same ID as other STM32F0X0.
2017-08-28 22:58:59 +02:00
a0b0b8a716
lm3s/tm4c: add TM4C1230C3PM
2017-07-21 13:29:41 -06:00
7663794fdf
Merge pull request #247 from schodet/stm32f4-x8-x32
...
Allow programming STM32F4 when using a low voltage
2017-07-09 14:33:06 -07:00
3846ea4708
stm32f4: allow selection of flash programming parallelism
2017-07-09 23:26:49 +02:00
09f49b469d
Merge pull request #256 from nar0909/patch-1
...
New Device Id update - QFAA G1
2017-07-09 13:45:52 -07:00
43ac4a04f7
New Device Id update - QFAA G1
...
New device Id - for NRF51822 QFAA G1 1529AM.
2017-07-04 12:32:39 +10:00
f036be8cb2
Identify and support LPC1112/102 MCU as well
...
Signed-off-by: Daniel Egger <daniel@eggers-club.de>
2017-06-23 21:52:13 +02:00
984f8b3d94
Merge pull request #248 from schodet/typo
...
stm32f4: fix typo in target name
2017-06-22 18:35:29 -07:00
02ce5e23b6
stm32f4: fix typo in target name
2017-06-19 10:56:20 +02:00
680aa30d52
stm32f4: add support for STM32F4[67]9
2017-06-19 10:41:38 +02:00
1ee1f441d5
stm32f4: write flash using byte access
2017-06-16 14:45:16 +02:00
408c5a9df2
stm32f4: Try to handle option bytes for more devices.
...
Correct the table for the OPTCRx values from errors in documentation and
error when entering the values.
2017-06-09 13:03:26 +02:00
8a7455f63e
src/target/stm32f4.c: Add STM32F7[2|3]x.
2017-06-09 13:03:26 +02:00
84e036a804
target/stm32f4: Document FLASH_OPTCR(1|2) registers.
2017-06-09 13:03:26 +02:00
2216587b39
src/target/stm32f4.c: Remove missleading DTCM comment.
...
Use different command string for F74x and F76x.
2017-06-09 13:03:26 +02:00
dc1c7611a9
src/target/stm32f4.c: All STM32F7 devs have option bytes at 0x1fff0000.
2017-06-09 13:03:26 +02:00
e43017d0a6
src/target/stm32f4.c: Add STM32F412 and F413.
...
F413 needs its own clause, as there is memory > 1 MB but no second bank.
2017-06-09 13:03:26 +02:00
24ed65d6b6
src/target/stm32f4.c: Declare CCMRAM only for devices with CCMRAM.
2017-06-09 13:03:26 +02:00
aaa7b0e38e
Merge pull request #217 from UweBonnes/stm32l4
...
Stm32l4
2017-05-23 12:22:04 -07:00
91839f3aee
stm32l4.c: Handle options.
2017-05-11 23:31:43 +02:00
289be4d9db
stm32l4.c: Add STM32L43/L44/L45/L46/L49/L4A.
2017-05-11 23:31:43 +02:00
94c822cb62
nrf51: Replace stub with C version and pass params in registers
2017-05-03 13:10:01 -07:00
01e3582525
fixed a bug in the breakpoint removal code
2017-04-28 13:22:59 +03:00
3c06396c8e
Constify strings and constant structs
2017-04-22 13:50:04 -07:00
1140ff957e
kinetis: Check/fix security byte on flash done.
2017-04-19 13:55:37 +12:00
08c0cafa09
stm32f4: Translate ITCM addresses to AXIM on flash write.
2017-04-18 12:56:33 +12:00
1f31099d46
Merge pull request #202 from gsmcmullin/tiva_srst_inhibit
...
lmi: Inhibit SRST on Tiva and add some fault checks.
2017-04-13 09:13:55 +12:00
644add19a6
lmi: Add comment explaining SRST inhibit
2017-04-13 08:42:16 +12:00
00183f1a9b
lmi: Inhibit SRST on Tiva and add some fault checks.
2017-04-12 15:52:09 +12:00
e4de689a09
cortexm: Check halt reason on stub exit.
2017-04-12 11:37:42 +12:00
8e2c2757b4
Merge pull request #195 from gsmcmullin/kinetis_work
...
Kinetis stuff
2017-03-28 13:58:00 +13:00
3d2fa6d233
target: Add new targets to end of list.
...
This shows targets enumerated in their natural order,
rather than in reverse.
2017-03-27 14:59:54 +13:00
0ed793fe24
kinetis: Clobber security byte with unsecure value.
...
May be overridden with `mon unsafe enable`.
2017-03-27 14:01:35 +13:00
7de304d72a
kinetis: Add recovery mode target.
2017-03-27 10:51:36 +13:00
bb93af50c3
adiv5: Debug log on failure to read ROM table.
2017-03-27 09:05:37 +13:00
21f71fd18a
More STM32L4 devices
...
Hello,
appended patch adds more STM32L4xx devices and was tested with L432 Nucleo.
Cheers
--
Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de
Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 1623569 ------- Fax. 06151 1623305 ---------
>From e9323a35b667659111226686221a037375a6c208 Mon Sep 17 00:00:00 2001
From: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Date: Thu, 2 Feb 2017 20:12:59 +0100
Subject: src/target/stm32l4.c: Add more devices.
2017-02-07 09:42:30 +13:00
41fb2a3104
More STM32L0 devices
...
Hello,
appended patch adds more STM32L0xx devices and was tested with L031 Nucleo.
Cheers
--
Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de
Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 1623569 ------- Fax. 06151 1623305 ---------
>From fb014dd8a90691056f10fbeffd7f21aaad196662 Mon Sep 17 00:00:00 2001
From: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Date: Fri, 27 Jan 2017 23:09:10 +0100
Subject: src/target/stm32l0.c: Add new categories.
2017-02-07 09:42:30 +13:00
62dedb9824
Add K22F
2017-02-07 09:36:47 +13:00
8c256d9e59
kinetis: Add KL03 devices.
2017-01-17 15:28:47 +13:00
cd1bef89bb
adiv5_dp_init: make ctrlstat volatile to supress warning.
2017-01-09 09:13:19 +13:00
085c980215
Remove EXTENDED_RESET define
2016-12-04 13:51:27 -08:00
a3c2592e44
Review feedback
2016-12-04 13:15:45 -08:00
469ecbf0f9
SAM4L: Add target driver for SAM4L
...
This commit adds a target driver for SAM4L and it depends on the
extended reset change.
2016-12-02 00:10:06 -08:00
0aef6c6774
SAM4L: Add extended reset to target interface
...
This adds a new function to the internal target interface
to allow the target to get control before reset is complete
so that it can do any additional work. On this target there
is a proprietary internal bit that has to be reset in some
cases to allow the core to continue operating.
2016-12-02 00:08:21 -08:00
15268ac663
EFM32HP (happy gecko) support
2016-11-16 08:23:40 +13:00
4212d7a394
add STM32F303 targets
2016-11-03 13:44:13 -07:00
e279844532
Merge pull request #167 from gsmcmullin/stm32l4_buffered
...
STM32L4: Use buffered flash model.
2016-10-31 12:06:00 -07:00
bcf3caf20e
cortexa: Disable AHB memory access to avoid issues with L2 cache.
2016-10-26 18:27:35 -07:00
f40883f2b2
cortexa: Wait for instruction complete on resume, and timeout if no response.
2016-10-25 10:22:21 -07:00
4348f0d135
Fixed double const.
...
The way the const pointer was written caused at least the clang compiler
to complain about double cosnst. I am not sure if the way it was written
before it resulted in the intended "make everything const" goal. But the
way it is written now it adheres to the right to left reading rule.
2016-10-19 14:37:03 -07:00
3b74d91c69
Add support for nRF51822QFAAH1
2016-10-16 19:52:47 +11:00
2e9660910c
STM32L4: Use buffered flash model.
2016-09-30 12:09:37 -07:00
517881f551
Merge pull request #154 from gsmcmullin/cortexa_breakpoints
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cortexa: Fix hardware breakpoints.
2016-09-29 21:39:04 -07:00
9a8cef04e0
Clean up debug format strings.
2016-09-29 21:31:18 -07:00
ba8f77abf8
cortexa: Fix hardware breakpoints.
2016-09-28 22:18:24 -07:00
ca364a889e
Fix #145
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Don't tc_printf in the probe.
tc_printf fixed to not crash of no controller connected.
2016-08-22 09:56:24 +12:00
df7ad91692
Merge pull request #146 from joshgrob/nRF51/52_update
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Adding new ConfigID value for nRF52832 QFAA B00
2016-08-10 07:33:28 +12:00
779e0b5d15
Print sizes in memory map using 32-bit formatting for newlib-nano.
2016-08-08 13:42:03 +12:00
fd4b8a02c0
Adding new ConfigID value for nRF52832 QFAA B00
2016-08-03 23:27:34 -04:00
f131460168
Don't use zx format with printf. Doesn't work with newlib.
...
Fixes #144 .
2016-07-19 10:45:46 +12:00
9a45d89b4a
target: Remove target_check_error from external interface.
2016-07-13 08:31:09 +12:00
Uwe Bonnes
Richard Meadows
Gareth McMullin
Eivind Alexander Bergem
Damien Merenne
David Lawrence
Francesco Valla
Fredrik Ahlberg
Valmantas Paliksa
Dömötör Gulyás
Thomas Bénéteau
Koen De Vleeschauwer
Alexey Shvetsov
Sid Price
mean
Artur Maciuszonek
Ken Healy
Kirill Zhumarin
dpslwk
Sylvain Munaut
Stephen Roe
Simon Rasmussen
David R. Piegdon
Alexander Zhang
Jeremy Elson
Boris Sorochkin
newbrain
anyn99
Carl
Ingmar Jager
Josh Robson Chase
Ingmar Jager
Mark Rages
Rik van der Heijden
Mike Walters
Richard Meadows
Antti Louko
Emil Fresk
newbrain
Piotr Esden-Tempski
Adam Greig
Christopher Woodall
Akila Ravihansa Perera
Mark Rages
Konsgn
Nick Downing
Carl Sandström
Chris Pavlina
Nicolas Schodet
nar0909
Daniel Egger
Gordon Smith
stoyan shopov
Stefan Agner
Chuck McManis
Angus Peart
Roger Clark
jgrob-an